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@@ -21,7 +21,10 @@
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* @version
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* - 1_01_230828 > ATY
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* -# Preliminary version, first Release
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-* - Undone
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+* - 1_02_231229 > ATY
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+* -# add multy addr and dev->channel
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+* - 1_01_240111 > ATY
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+* -# add lock
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********************************************************************************
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*/
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@@ -34,7 +37,657 @@
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/******************************************************************************/
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+/**
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+ * @brief
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+ *
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+ * @param data
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+ * @param len
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_WriteRead(uint8_t* data, uint8_t len, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0;
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+ __ATY_LOCK(dev);
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+ dev->nssSet(_ATY_HL_L);
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+ if(dev->debugEnable == 1){
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+ for(int i = 0; i < len; i++) dev->LOG("%02X", data[i]);
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+ dev->LOG(" ");
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+ }
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+ errCode = dev->spiProcess(data, len, _ATY_RW_RW);
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+ if(dev->debugEnable == 1){
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+ for(int i = 0; i < len; i++) dev->LOG("%02X", data[i]);
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+ dev->LOG(" ");
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+ }
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+ dev->nssSet(_ATY_HL_H);
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+ __ATY_UNLOCK(dev);
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+ return errCode;
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+}
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+
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+
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+/**
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+ * @brief
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+ *
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_Reset(struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0, resetBuf[9] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
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+ __ATY_LOCK(dev);
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+ dev->syncSet(_ATY_HL_H);
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+ // dev->delay(10);
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+ dev->nssSet(_ATY_HL_H);
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+ dev->delay(10);
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+ __ATY_UNLOCK(dev);
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+
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+ // write more than 64 bits to reset AD7124
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+ errCode = AD7124_WriteRead(resetBuf, 9, dev);
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+ return errCode;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param id
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_ReadId(uint8_t* id, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0, groupTrans[2] = {0};
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+ groupTrans[0] = 0x45;
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+ groupTrans[1] = 0;
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+ errCode = AD7124_WriteRead(groupTrans, 2, dev);
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+ dev->id = groupTrans[1];
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+ *id = dev->id;
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ID: %02X\r\n", dev->id);
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+ return errCode;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param regAddr
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+ * @param data
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+ * @param len
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+ * @param dev
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+ * @return uint8_t
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+ * @note AD7124_ERR_REG_SPI_IGNORE_ERR only for crc trans
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+ */
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+uint8_t AD7124_WriteReg(uint8_t regAddr, uint32_t data, uint8_t len, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
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+ groupTrans[0] = AD7124_COMM_REG_WA(regAddr);
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+ for(i = 0; i < len; i++){
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+ groupTrans[len - i] = data & 0xFF;
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+ data = data >> 8;
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+ }
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+ if(dev->debugEnable == 1){
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+ for(i = 0; i < len + 1; i++)
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+ dev->LOG("%02X", groupTrans[i]);
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+ dev->LOG(" ");
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+ }
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+ errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
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+ return errCode;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param regAddr
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+ * @param data
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+ * @param len
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_ReadReg(uint8_t regAddr, uint32_t* data, uint8_t len, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
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+ groupTrans[0] = AD7124_COMM_REG_RA(regAddr);
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+ errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
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+ if(len == 1)
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+ *data = groupTrans[1];
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+ else if(len == 2)
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+ *data = (groupTrans[1] + (groupTrans[2] << 8));
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+ else if(len == 3)
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+ *data = (groupTrans[1] + (groupTrans[2] << 8) + (groupTrans[3] << 16));
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+ if(dev->debugEnable == 1){
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+ for(i = 0; i < len + 1; i++)
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+ dev->LOG("%X", data);
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+ dev->LOG(" ");
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+ }
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+ return errCode;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param data
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_ReadData(uint8_t* data, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t errCode = 0, i = 0;
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+ data[0] = AD7124_COMM_REG_RA(AD7124_DATA_REG);
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+ errCode = AD7124_WriteRead(data, 5, dev);
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+ if(dev->debugEnable == 1){
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+ dev->LOG("Data: 0x");
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+ for(i = 0; i < 5; i++)
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+ dev->LOG("%02X", data[i]);
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+ dev->LOG(" ");
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+ }
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+ return errCode;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param status
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_ReadStatus(uint8_t* status, struct AD7124_ATY_Dev* dev)
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+{
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+ if(AD7124_ReadReg(AD7124_STATUS_REG, (uint32_t*)status, 1, dev)){
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ERR: STATE %02X%02X\r\n",
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+ status[0], status[1]);
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+ return 1;
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+ }
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+ dev->delay(10);
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+ return 0;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param data
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+ * @param resolution
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+ * @param refRes
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+ * @param gain
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+ * @return float
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+ */
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+float AD7124_DataToRes(uint32_t data, uint8_t resolution, float refRes, uint8_t gain)
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+{
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+ uint32_t tempNum = 1;
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+ uint8_t i = 0;
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+ for(i = 0; i < resolution - 1; i++)
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+ tempNum *= 2;
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+ return (float)((((float)data - (float)tempNum) * refRes) / ((float)gain * (float)tempNum));
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param data
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+ * @return float
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+ */
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+float AD7124_DataToResDefault(uint32_t data)
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+{
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+ return (float)((((float)data - 8388608.0f) * 5110.0f) / (16.0f * 8388608.0f));
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param cfg
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_Init(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
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+{
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+ uint8_t id = 0, status[2] = {0};
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+ dev->enSet(_ATY_HL_H);
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+ if(AD7124_Reset(dev)){
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ERR: RST\r\n");
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+ return 1;
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+ }
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+ if(AD7124_ReadId(&id, dev)){
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ERR: ID\r\n");
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+ return 2;
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+ }
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+ if(AD7124_ReadStatus(status, dev)){
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ERR: Status\r\n");
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+ return 3;
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+ }
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+ if(AD7124_Config(cfg, dev)){
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+ if(dev->debugEnable == 1)
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+ dev->LOG("AD7124_ERR: CFG\r\n");
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+ return 4;
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+ }
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+ return 0;
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+}
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+
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+/**
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+ * @brief
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+ *
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+ * @param cfg
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+ * @param dev
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+ * @return uint8_t
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+ */
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+uint8_t AD7124_Config(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
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+{
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+ if(cfg->AD7124_ADC_CTRL_REG_t) AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev);
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+ if(cfg->AD7124_IO_CTRL1_REG_t) AD7124_WriteReg(AD7124_IO_CTRL1_REG, cfg->AD7124_IO_CTRL1_REG_t, 3, dev);
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+ if(cfg->AD7124_IO_CTRL2_REG_t) AD7124_WriteReg(AD7124_IO_CTRL2_REG, cfg->AD7124_IO_CTRL2_REG_t, 2, dev);
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+ if(cfg->AD7124_ERREN_REG_t) AD7124_WriteReg(AD7124_ERREN_REG, cfg->AD7124_ERREN_REG_t, 3, dev);
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+
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+ if(cfg->AD7124_CH0_MAP_REG_t) AD7124_WriteReg(AD7124_CH0_MAP_REG, cfg->AD7124_CH0_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH1_MAP_REG_t) AD7124_WriteReg(AD7124_CH1_MAP_REG, cfg->AD7124_CH1_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH2_MAP_REG_t) AD7124_WriteReg(AD7124_CH2_MAP_REG, cfg->AD7124_CH2_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH3_MAP_REG_t) AD7124_WriteReg(AD7124_CH3_MAP_REG, cfg->AD7124_CH3_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH4_MAP_REG_t) AD7124_WriteReg(AD7124_CH4_MAP_REG, cfg->AD7124_CH4_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH5_MAP_REG_t) AD7124_WriteReg(AD7124_CH5_MAP_REG, cfg->AD7124_CH5_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH6_MAP_REG_t) AD7124_WriteReg(AD7124_CH6_MAP_REG, cfg->AD7124_CH6_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH7_MAP_REG_t) AD7124_WriteReg(AD7124_CH7_MAP_REG, cfg->AD7124_CH7_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH8_MAP_REG_t) AD7124_WriteReg(AD7124_CH8_MAP_REG, cfg->AD7124_CH8_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH9_MAP_REG_t) AD7124_WriteReg(AD7124_CH9_MAP_REG, cfg->AD7124_CH9_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH10_MAP_REG_t) AD7124_WriteReg(AD7124_CH10_MAP_REG, cfg->AD7124_CH10_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH11_MAP_REG_t) AD7124_WriteReg(AD7124_CH11_MAP_REG, cfg->AD7124_CH11_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH12_MAP_REG_t) AD7124_WriteReg(AD7124_CH12_MAP_REG, cfg->AD7124_CH12_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH13_MAP_REG_t) AD7124_WriteReg(AD7124_CH13_MAP_REG, cfg->AD7124_CH13_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH14_MAP_REG_t) AD7124_WriteReg(AD7124_CH14_MAP_REG, cfg->AD7124_CH14_MAP_REG_t, 2, dev);
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+ if(cfg->AD7124_CH15_MAP_REG_t) AD7124_WriteReg(AD7124_CH15_MAP_REG, cfg->AD7124_CH15_MAP_REG_t, 2, dev);
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+
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+ if(cfg->AD7124_CFG0_REG_t) AD7124_WriteReg(AD7124_CFG0_REG, cfg->AD7124_CFG0_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG1_REG_t) AD7124_WriteReg(AD7124_CFG1_REG, cfg->AD7124_CFG1_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG2_REG_t) AD7124_WriteReg(AD7124_CFG2_REG, cfg->AD7124_CFG2_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG3_REG_t) AD7124_WriteReg(AD7124_CFG3_REG, cfg->AD7124_CFG3_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG4_REG_t) AD7124_WriteReg(AD7124_CFG4_REG, cfg->AD7124_CFG4_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG5_REG_t) AD7124_WriteReg(AD7124_CFG5_REG, cfg->AD7124_CFG5_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG6_REG_t) AD7124_WriteReg(AD7124_CFG6_REG, cfg->AD7124_CFG6_REG_t, 2, dev);
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+ if(cfg->AD7124_CFG7_REG_t) AD7124_WriteReg(AD7124_CFG7_REG, cfg->AD7124_CFG7_REG_t, 2, dev);
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+
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+ if(cfg->AD7124_FILT0_REG_t) AD7124_WriteReg(AD7124_FILT0_REG, cfg->AD7124_FILT0_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT1_REG_t) AD7124_WriteReg(AD7124_FILT1_REG, cfg->AD7124_FILT1_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT2_REG_t) AD7124_WriteReg(AD7124_FILT2_REG, cfg->AD7124_FILT2_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT3_REG_t) AD7124_WriteReg(AD7124_FILT3_REG, cfg->AD7124_FILT3_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT4_REG_t) AD7124_WriteReg(AD7124_FILT4_REG, cfg->AD7124_FILT4_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT5_REG_t) AD7124_WriteReg(AD7124_FILT5_REG, cfg->AD7124_FILT5_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT6_REG_t) AD7124_WriteReg(AD7124_FILT6_REG, cfg->AD7124_FILT6_REG_t, 3, dev);
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+ if(cfg->AD7124_FILT7_REG_t) AD7124_WriteReg(AD7124_FILT7_REG, cfg->AD7124_FILT7_REG_t, 3, dev);
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+
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+ if(cfg->AD7124_OFFS0_REG_t) AD7124_WriteReg(AD7124_OFFS0_REG, cfg->AD7124_OFFS0_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS1_REG_t) AD7124_WriteReg(AD7124_OFFS1_REG, cfg->AD7124_OFFS1_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS2_REG_t) AD7124_WriteReg(AD7124_OFFS2_REG, cfg->AD7124_OFFS2_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS3_REG_t) AD7124_WriteReg(AD7124_OFFS3_REG, cfg->AD7124_OFFS3_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS4_REG_t) AD7124_WriteReg(AD7124_OFFS4_REG, cfg->AD7124_OFFS4_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS5_REG_t) AD7124_WriteReg(AD7124_OFFS5_REG, cfg->AD7124_OFFS5_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS6_REG_t) AD7124_WriteReg(AD7124_OFFS6_REG, cfg->AD7124_OFFS6_REG_t, 3, dev);
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+ if(cfg->AD7124_OFFS7_REG_t) AD7124_WriteReg(AD7124_OFFS7_REG, cfg->AD7124_OFFS7_REG_t, 3, dev);
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+
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+ if(cfg->AD7124_GAIN0_REG_t) AD7124_WriteReg(AD7124_GAIN0_REG, cfg->AD7124_GAIN0_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN1_REG_t) AD7124_WriteReg(AD7124_GAIN1_REG, cfg->AD7124_GAIN1_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN2_REG_t) AD7124_WriteReg(AD7124_GAIN2_REG, cfg->AD7124_GAIN2_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN3_REG_t) AD7124_WriteReg(AD7124_GAIN3_REG, cfg->AD7124_GAIN3_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN4_REG_t) AD7124_WriteReg(AD7124_GAIN4_REG, cfg->AD7124_GAIN4_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN5_REG_t) AD7124_WriteReg(AD7124_GAIN5_REG, cfg->AD7124_GAIN5_REG_t, 3, dev);
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+ if(cfg->AD7124_GAIN6_REG_t) AD7124_WriteReg(AD7124_GAIN6_REG, cfg->AD7124_GAIN6_REG_t, 3, dev);
|
|
|
+ if(cfg->AD7124_GAIN7_REG_t) AD7124_WriteReg(AD7124_GAIN7_REG, cfg->AD7124_GAIN7_REG_t, 3, dev);
|
|
|
+
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("\r\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief
|
|
|
+ *
|
|
|
+ * @param calibrateType b1111
|
|
|
+ * @param cfg
|
|
|
+ * @param dev
|
|
|
+ * @return uint8_t
|
|
|
+ * @note 0001 int full cal at mid power
|
|
|
+ 0010 int zero cal at full power
|
|
|
+ 0100 sys full cal
|
|
|
+ 1000 sys zero cal
|
|
|
+ */
|
|
|
+uint8_t AD7124_Calibrate(uint8_t calibrateType, struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
|
|
|
+{
|
|
|
+ uint32_t regTrans = 0;
|
|
|
+ AD7124_WriteReg(AD7124_OFFS0_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS1_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS2_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS3_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS4_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS5_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS6_REG, 0x800000, 3, dev);
|
|
|
+ AD7124_WriteReg(AD7124_OFFS7_REG, 0x800000, 3, dev);
|
|
|
+
|
|
|
+ if(calibrateType & AD7124_CALIBRATE_INT_FULL){
|
|
|
+ AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0058, 2, dev); // int full cal at mid power
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ dev->delay(1500); // 1300ms min
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ }
|
|
|
+ if(calibrateType & AD7124_CALIBRATE_INT_ZERO){
|
|
|
+ AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0094, 2, dev); // int zero cal at full power
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ dev->delay(100); // 80ms min
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ }
|
|
|
+ if(calibrateType & AD7124_CALIBRATE_SYS_FULL){
|
|
|
+ AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x00A0, 2, dev); // sys full cal
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ dev->delay(100); // 80ms min
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ }
|
|
|
+ if(calibrateType & AD7124_CALIBRATE_SYS_ZERO){
|
|
|
+ AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x009C, 2, dev); // sys zero cal
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ dev->delay(100); // 80ms min
|
|
|
+ AD7124_ReadReg(AD7124_ADC_CTRL_REG, ®Trans, 2, dev);
|
|
|
+ }
|
|
|
+
|
|
|
+ AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev); // detect mode
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("\r\n");
|
|
|
+ dev->delay(1);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief
|
|
|
+ *
|
|
|
+ * @param dev
|
|
|
+ * @return uint8_t
|
|
|
+ */
|
|
|
+uint8_t AD7124_ReadAllReg(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
|
|
|
+{
|
|
|
+ uint8_t i = 0;
|
|
|
+ uint32_t* p = (uint32_t*)cfg;
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("Regs %d\r\n", (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)));
|
|
|
+ for(i = 0; i < (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)); i++){ // 0x00~0x38
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("Reg 0x%02X: ", i);
|
|
|
+ AD7124_ReadReg(i, (p + i), 3, dev);
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("\r\n");
|
|
|
+ }
|
|
|
+ // AD7124_ReadReg(AD7124_ADC_CTRL_REG, groupTrans, 2, dev);
|
|
|
+
|
|
|
+ if(dev->debugEnable == 1)
|
|
|
+ dev->LOG("\r\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
|
|
|
#endif /* __AD7124_ATY_C */
|
|
|
|
|
|
+/************************************ etc *************************************/
|
|
|
+/* init */
|
|
|
+// void AD7124_1_NSS_SET(uint8_t level){
|
|
|
+// if(level == _ATY_HL_L)
|
|
|
+// GPIO_SET_L(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
|
|
|
+// else if(level == _ATY_HL_H)
|
|
|
+// GPIO_SET_H(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
|
|
|
+// }
|
|
|
+// void AD7124_1_EN_SET(uint8_t level){ }
|
|
|
+// void AD7124_1_SYNC_SET(uint8_t level){ }
|
|
|
+// uint8_t AD7124_1_SPI(uint8_t* data_t, uint16_t len, uint8_t rw){
|
|
|
+// if(rw == _ATY_RW_RW)
|
|
|
+// return HAL_SPI_TransmitReceive(&hspi2, (uint8_t*)data_t, (uint8_t*)data_t, len, 1000);
|
|
|
+// return 0;
|
|
|
+// }
|
|
|
+
|
|
|
+// struct AD7124_ATY_Dev AD7124_ATY_Dev_1 = {
|
|
|
+// .id = 0,
|
|
|
+// .nssSet = AD7124_1_NSS_SET,
|
|
|
+// .enSet = AD7124_1_EN_SET,
|
|
|
+// .syncSet = AD7124_1_SYNC_SET,
|
|
|
+// .spiProcess = AD7124_1_SPI,
|
|
|
+// .delay = HAL_Delay,
|
|
|
+// .lock = _ATY_UNLOCKED,
|
|
|
+// .debugEnable = 0,
|
|
|
+// .LOG = printf
|
|
|
+// };
|
|
|
+// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_RTD4_1 = {
|
|
|
+// .AD7124_ADC_CTRL_REG_t = 0x0480,
|
|
|
+// .AD7124_IO_CTRL1_REG_t = 0x000400,
|
|
|
+// // .AD7124_ERREN_REG_t = 0x06FFFF,
|
|
|
+
|
|
|
+// .AD7124_CFG0_REG_t = 0x09E4,
|
|
|
+// .AD7124_FILT0_REG_t = 0x0060180,
|
|
|
+// .AD7124_GAIN0_REG_t = 0x5558CC,
|
|
|
+// .AD7124_CH0_MAP_REG_t = 0x9211, //IC Temp
|
|
|
+
|
|
|
+// .AD7124_CFG1_REG_t = 0x09E4,
|
|
|
+// .AD7124_FILT1_REG_t = 0x0060180,
|
|
|
+// .AD7124_GAIN1_REG_t = 0x05558CC,
|
|
|
+// .AD7124_CH1_MAP_REG_t = 0x9022,
|
|
|
+// };
|
|
|
+// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC1_1 = {
|
|
|
+// .AD7124_ADC_CTRL_REG_t = 0x0480,
|
|
|
+// .AD7124_IO_CTRL1_REG_t = 0x002040,
|
|
|
+
|
|
|
+// .AD7124_CFG1_REG_t = 0x09E1,
|
|
|
+// .AD7124_FILT1_REG_t = 0x0060180,
|
|
|
+// .AD7124_GAIN1_REG_t = 0x05558CC,
|
|
|
+// .AD7124_CH2_MAP_REG_t = 0x90A6, // 500uA * 5.11K = 2.5Vref, 1K gain 2 max
|
|
|
+// };
|
|
|
+// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC10_1 = {
|
|
|
+// .AD7124_ADC_CTRL_REG_t = 0x0580,
|
|
|
+
|
|
|
+// .AD7124_CFG1_REG_t = 0x09F0,
|
|
|
+// .AD7124_FILT1_REG_t = 0x0060180,
|
|
|
+// .AD7124_GAIN1_REG_t = 0x5558CC,
|
|
|
+
|
|
|
+// .AD7124_CH3_MAP_REG_t = 0x918D,
|
|
|
+// .AD7124_CH4_MAP_REG_t = 0x91CF,
|
|
|
+// };
|
|
|
+// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_TC_1 = {
|
|
|
+// .AD7124_ADC_CTRL_REG_t = 0x0580,
|
|
|
+// .AD7124_IO_CTRL2_REG_t = 0x0500,
|
|
|
+
|
|
|
+// .AD7124_CFG1_REG_t = 0x09F7,
|
|
|
+// .AD7124_FILT1_REG_t = 0x0060180,
|
|
|
+// .AD7124_GAIN1_REG_t = 0x5558CC,
|
|
|
+
|
|
|
+// .AD7124_CH5_MAP_REG_t = 0x9109,
|
|
|
+// .AD7124_CH6_MAP_REG_t = 0x914B,
|
|
|
+// };
|
|
|
+
|
|
|
+
|
|
|
+/* use */
|
|
|
+// uint8_t group_AD7124_Data[5] = {0};
|
|
|
+// if(adInitFlag == 0){
|
|
|
+// adInitFlag = 1;
|
|
|
+// AD7124_Init(&AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
|
|
|
+// &AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
|
|
|
+// }
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+
|
|
|
+// // IC Temp
|
|
|
+// fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0f) - 272.5f;
|
|
|
+
|
|
|
+// // RTD4
|
|
|
+// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 16);
|
|
|
+// fastTempCalc = ALGO_Temp_RTD_Res_Fast(calcRes);
|
|
|
+// aboveTempCalc = ALGO_Temp_RTD_Res_Above(calcRes);
|
|
|
+// belowTempCalc = ALGO_Temp_RTD_Res_Below(calcRes);
|
|
|
+
|
|
|
+// // NTC1K
|
|
|
+// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 2);
|
|
|
+// fastTempCalc = ALGO_ResToKelvinTemp((calcRes / 1000.0f), 1.0f, 3950);
|
|
|
+// // NTC10K
|
|
|
+// calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (1.0f * 8388608.0f));
|
|
|
+// calcRes = ((calcVol * 10.0f) / (2500.0f - calcVol));
|
|
|
+// fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3380);
|
|
|
+
|
|
|
+// // TC
|
|
|
+// calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (128.0f * 8388608.0f));
|
|
|
+// float coldTemp = 25.0f;
|
|
|
+// float calcVolCold = ALGO_Temp_TC_TempToVol('T', coldTemp);
|
|
|
+// calcVol += calcVolCold;
|
|
|
+// aboveTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
|
|
|
+// belowTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
|
|
|
+// fastTempCalc = aboveTempCalc;
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+// ALGO_Kalman1D_S kfp1D_BT[2] = {{0, 0, 1, 1, 1, 1e-7, 1e-6}, {0, 0, 1, 1, 1, 1e-7, 1e-6}};
|
|
|
+// rcPara_t rcfp_BT[2] = {{0.02262, 0}, {0.036, 0}};
|
|
|
+// uint8_t group_AD7124_Data[5] = {0};
|
|
|
+
|
|
|
+// uint8_t adDetectType = 6; // 0: IC temp, 1: RTD, 2: NTC1K, 34: NTC10K, 56: TC
|
|
|
+// uint8_t adInitFlag = 0;
|
|
|
+
|
|
|
+// void AD7124_Calc(uint8_t* codeGroup)
|
|
|
+// {
|
|
|
+// if((codeGroup[4] & 0x80) != 0)
|
|
|
+// return;
|
|
|
+
|
|
|
+// if((codeGroup[4] & 0x0F) != adDetectType)
|
|
|
+// return;
|
|
|
+
|
|
|
+// uint32_t ad7124Code = (codeGroup[3] + (codeGroup[2] << 8) + (codeGroup[1] << 16));
|
|
|
+// static uint32_t lastAd7124Code = 0;
|
|
|
+// if(lastAd7124Code == ad7124Code)
|
|
|
+// return;
|
|
|
+// lastAd7124Code = ad7124Code;
|
|
|
+
|
|
|
+// float calcVol = 0, calcRes = 0, fastTempCalc = 0, aboveTempCalc = 0, belowTempCalc = 0;
|
|
|
+// if((codeGroup[4] & 0x0F) == 0){ // IC Temp
|
|
|
+// fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0f) - 272.5f;
|
|
|
+// }
|
|
|
+// if((codeGroup[4] & 0x0F) == 1){ // RTD4
|
|
|
+// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 16);
|
|
|
+// fastTempCalc = ALGO_Temp_RTD_Res_Fast(calcRes);
|
|
|
+// aboveTempCalc = ALGO_Temp_RTD_Res_Above(calcRes);
|
|
|
+// belowTempCalc = ALGO_Temp_RTD_Res_Below(calcRes);
|
|
|
+// }
|
|
|
+// if((codeGroup[4] & 0x0F) == 2){ // NTC1K
|
|
|
+// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 2);
|
|
|
+// fastTempCalc = ALGO_ResToKelvinTemp((calcRes / 1000.0f), 1.0f, 3950);
|
|
|
+// }
|
|
|
+// if(((codeGroup[4] & 0x0F) == 3) || ((codeGroup[4] & 0x0F) == 4)){ // NTC10K
|
|
|
+// calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (1.0f * 8388608.0f));
|
|
|
+// calcRes = ((calcVol * 10.0f) / (2500.0f - calcVol));
|
|
|
+// if((codeGroup[4] & 0x0F) == 3)
|
|
|
+// fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3380);
|
|
|
+// else if((codeGroup[4] & 0x0F) == 4)
|
|
|
+// fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3950);
|
|
|
+// }
|
|
|
+// if(((codeGroup[4] & 0x0F) == 5) || ((codeGroup[4] & 0x0F) == 6)){ // TC
|
|
|
+// calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (128.0f * 8388608.0f));
|
|
|
+// float coldTemp = 25.0f;
|
|
|
+// float calcVolCold = ALGO_Temp_TC_TempToVol('T', coldTemp);
|
|
|
+// calcVol += calcVolCold;
|
|
|
+// aboveTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
|
|
|
+// belowTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
|
|
|
+// fastTempCalc = belowTempCalc;
|
|
|
+// }
|
|
|
+
|
|
|
+// float rcTemp[2] = {0};
|
|
|
+// rcTemp[0] = rcLpFiter(&rcfp_BT[0], belowTempCalc);
|
|
|
+// rcTemp[1] = rcLpFiter(&rcfp_BT[1], rcTemp[0]);
|
|
|
+// if(ALGO_ABS(belowTempCalc - rcTemp[0]) > 0.1) {
|
|
|
+// rcfp_BT[0].lVal = belowTempCalc;
|
|
|
+// rcfp_BT[1].lVal = belowTempCalc;
|
|
|
+// }
|
|
|
+
|
|
|
+// float kalmanBelowTemp[2] = {0};
|
|
|
+// kalmanBelowTemp[0] = ALGO_KalmanFilter1D(&kfp1D_BT[0], rcTemp[1]);
|
|
|
+// kalmanBelowTemp[1] = ALGO_KalmanFilter1D(&kfp1D_BT[1], kalmanBelowTemp[0]);
|
|
|
+// if(ALGO_ABS(kalmanBelowTemp[0] - belowTempCalc) > 0.1){
|
|
|
+// kfp1D_BT[0].X = belowTempCalc;
|
|
|
+// kfp1D_BT[1].X = belowTempCalc;
|
|
|
+// kalmanBelowTemp[0] = belowTempCalc;
|
|
|
+// kalmanBelowTemp[1] = belowTempCalc;
|
|
|
+// }
|
|
|
+
|
|
|
+// #define AD7124_DBG
|
|
|
+// #ifdef AD7124_DBG
|
|
|
+// printf("C %02d: ", (codeGroup[4] & 0x0F));
|
|
|
+// printf("%02X%02X%02X%02X%02X ",
|
|
|
+// codeGroup[0], codeGroup[1],
|
|
|
+// codeGroup[2], codeGroup[3],
|
|
|
+// codeGroup[4]);
|
|
|
+// printf("%.09f ", calcVol);
|
|
|
+// printf("%.09f ", calcRes);
|
|
|
+// printf("%.09f ", fastTempCalc);
|
|
|
+// printf("%.09f ", aboveTempCalc);
|
|
|
+// printf("%.09f ", belowTempCalc);
|
|
|
+// // printf("%.09f ", rcTemp[0]);
|
|
|
+// // printf("%.09f ", rcTemp[1]);
|
|
|
+// // printf("%.09f ", kalmanBelowTemp[0]);
|
|
|
+// // printf("%.09f ", kalmanBelowTemp[1]);
|
|
|
+// printf("\r\n");
|
|
|
+// #endif
|
|
|
+// }
|
|
|
+
|
|
|
+// void AD7124_Detect(void)
|
|
|
+// {
|
|
|
+// static uint8_t lastChannel = 0;
|
|
|
+// if(lastChannel != adDetectType){
|
|
|
+// lastChannel = adDetectType;
|
|
|
+// adInitFlag = 0;
|
|
|
+// }
|
|
|
+// switch(adDetectType)
|
|
|
+// {
|
|
|
+// case 0:
|
|
|
+// case 1:
|
|
|
+// if(adInitFlag == 0){
|
|
|
+// adInitFlag = 1;
|
|
|
+// AD7124_Init(&AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
|
|
|
+// &AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
|
|
|
+// }
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// break;
|
|
|
+// case 2:
|
|
|
+// if(adInitFlag == 0){
|
|
|
+// adInitFlag = 1;
|
|
|
+// AD7124_Init(&AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
|
|
|
+// &AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
|
|
|
+// }
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// break;
|
|
|
+// case 3:
|
|
|
+// case 4:
|
|
|
+// if(adInitFlag == 0){
|
|
|
+// adInitFlag = 1;
|
|
|
+// AD7124_Init(&AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
|
|
|
+// &AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
|
|
|
+// }
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// break;
|
|
|
+// case 5:
|
|
|
+// case 6:
|
|
|
+// if(adInitFlag == 0){
|
|
|
+// adInitFlag = 1;
|
|
|
+// AD7124_Init(&AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
|
|
|
+// &AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
|
|
|
+// }
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
|
|
|
+// AD7124_Calc(group_AD7124_Data);
|
|
|
+// break;
|
|
|
+// default:
|
|
|
+// break;
|
|
|
+// }
|
|
|
+// }
|
|
|
+
|
|
|
+/******************************************************************************/
|
|
|
+
|
|
|
/******************************** End Of File *********************************/
|