fw_cid_stc8g.h 2.5 KB

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  1. // Copyright 2021 IOsetting <iosetting(at)outlook.com>
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #ifndef __FW_CID_STC8G_H__
  15. #define __FW_CID_STC8G_H__
  16. #include "fw_reg_base.h"
  17. #if (__CONF_MCU_MODEL == MCU_MODEL_STC8G1K04 )
  18. #define __CID_ADDR 0x0FE9
  19. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G1K08 )
  20. #define __CID_ADDR 0x1FE9
  21. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G1K12 )
  22. #define __CID_ADDR 0x2FE9
  23. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G2K16 )
  24. #define __CID_ADDR 0x3FE9
  25. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G1K17 )
  26. #define __CID_ADDR 0x43E9
  27. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G2K32 )
  28. #define __CID_ADDR 0x7FE9
  29. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G2K48 )
  30. #define __CID_ADDR 0xBFE9
  31. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G2K60 )
  32. #define __CID_ADDR 0xEFE9
  33. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8G2K64 )
  34. #define __CID_ADDR 0xFDE9
  35. #endif
  36. #define ID_ROMADDR ( (unsigned char __CODE *)(__CID_ADDR + 15)) // MCU ID 7 bytes
  37. #define VREF_ROMADDR (*(unsigned int __CODE *)(__CID_ADDR + 13))
  38. #define F32K_ROMADDR (*(unsigned int __CODE *)(__CID_ADDR + 11))
  39. #define T22M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 10)) //22.1184MHz (20M)
  40. #define T24M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 9)) //24MHz (20M)
  41. #define T20M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 8)) //20MHz (20M)
  42. #define T27M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 7)) //27MHz (35M)
  43. #define T30M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 6)) //30MHz (35M)
  44. #define T33M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 5)) //33.1776MHz (35M)
  45. #define T35M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 4)) //35MHz (35M)
  46. #define T36M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 3)) //36.864MHz (35M)
  47. #define VRT20M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 1)) //VRTRIM of 20M
  48. #define VRT35M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 0)) //VRTRIM of 35M
  49. #endif