ATY_LIB/GP22_ATY.h

/**
* @file GP22_ATY.h
*
* @param Project DEVICE_GENERAL_ATY_LIB
*
* @author ATY
*
* @copyright
*       - Copyright 2017 - 2023 MZ-ATY
*       - This code follows:
*           - MZ-ATY Various Contents Joint Statement -
*               <a href="https://mengze.top/MZ-ATY_VCJS">
*                        https://mengze.top/MZ-ATY_VCJS</a>
*           - CC 4.0 BY-NC-SA -
*               <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/">
*                        https://creativecommons.org/licenses/by-nc-sa/4.0/</a>
*       - Your use will be deemed to have accepted the terms of this statement.
*
* @brief Base functions of GP22 for all embedded device
*
* @version
*       - 1_01_220901 > ATY
*           -# Preliminary version, first Release
********************************************************************************
*/

#ifndef __GP22_ATY_H
#define __GP22_ATY_H

#include "INCLUDE_ATY.h"
#include "ALGO_AlgorithmBase_ATY.h"
#include "ALGO_Temperature_ATY.h"
#include "ALGO_Kalman_ATY.h"
#include "HW_GPIO_ATY.h"
#include "HW_SPI_ATY.h"

#include "main.h"

/******************************* For user *************************************/
// #define __DEBUG_GP22_ATY
// #define __DEBUG_GP22_OPCODE_ATY

extern uint8_t gp22Mode;

extern uint8_t GP22_Ids[8];
extern uint32_t GP22_REG[7];

extern uint32_t tofValue[4];
extern float tempRealValue[2];
extern float echoTimeDetect[2];
extern float echoTimeCalc[2];
extern float speedWave[2];
extern uint32_t PW1ST_ValueA;

extern float machineDelayTime;
extern float usDistance;

extern uint8_t pulseGenNum;
extern uint8_t firstWaveEnable;
extern uint8_t pulseNum;
extern uint16_t ignoreTime;
extern uint16_t offsetValue;
/******************************************************************************/



/******************************* For board ************************************/
/*
The TDC-GP22 does only support the following SPI mode (Motorola specification) *
Clock Phase Bit = 1 Clock Polarity Bit = 0
*/
#define GP22_HSC_FREQ                   8                                       // MHz
#define GP22_CLKHS_DIV                  1
/* The resulting clock after the predivider has to be in the allowed range of
2 MHz to 8 MHz in single and double resolution and from 2 MHz to 6 MHz in quad resolution */
#define GP22_CLKHS_FREQ                 (GP22_HSC_FREQ / (1 << GP22_CLKHS_DIV)) // MHz
#define GP22_CLKHS_PERIOD               0
extern float GP22_CALC_CLKHS_FREQ;                                              // MHz

#define GP22_TEMP_REF_RES               10.0        // KOhm
/******************************************************************************/

uint8_t GP22_Process_Run(uint8_t cmdCode);

#define GP22_STEP_RESET                 0x01
#define GP22_STEP_SPI_TEST              0x02
#define GP22_STEP_REG_INIT              0x04
#define GP22_STEP_READ_ID               0x08
#define GP22_STEP_COMPARE_E2            0x10
#define GP22_STEP_CALC_HSC              0x20
#define GP22_STEP_START_TEMP            0x40
#define GP22_STEP_START_TOF             0x80

#define GP22_SIGNAL_H                   GPIO_SET_H(GP22_SIGNAL_PORT, GP22_SIGNAL_PIN)
#define GP22_SIGNAL_L                   GPIO_SET_L(GP22_SIGNAL_PORT, GP22_SIGNAL_PIN)
#define GP22_SIGNAL_A_H                 GPIO_SET_H(GP22_SIGNAL_A_PORT, GP22_SIGNAL_A_PIN)
#define GP22_SIGNAL_A_L                 GPIO_SET_L(GP22_SIGNAL_A_PORT, GP22_SIGNAL_A_PIN)

/* Device define **************************************************************/
/* GPIO define outside of spi *************************************************/
/* IO Info(suit for 5V - 3V MCU and 3.3V - 2.8V GP22, line connect 100R res in series)
        RSTN    PP
        EN      PP
        CSN     PP
        MOSI    PP
        MISO    HI
        SCLK    PP
        INTN    HI(High impedance input)
*/
#define GP22_ENABLE                     GPIO_SET_L(GP22_CSN_PORT, GP22_CSN_PIN)
#define GP22_DISABLE                    GPIO_SET_H(GP22_CSN_PORT, GP22_CSN_PIN)
#define GP22_RESET                      GPIO_SET_L(GP22_RST_PORT, GP22_RST_PIN)
#define GP22_NORESET                    GPIO_SET_H(GP22_RST_PORT, GP22_RST_PIN)
#define GP22_READ_INT_H                 GPIO_GET_H(GP22_INT_PORT, GP22_INT_PIN)
#define GP22_READ_INT_L                 GPIO_GET_L(GP22_INT_PORT, GP22_INT_PIN)

#define GP22_WAKE \
do{ \
    GPIO_SET_H(GP22_EN_PORT, GP22_EN_PIN); \
    GPIO_SET_H(GP22_INT_PORT, GP22_INT_PIN); \
} while(0)

#define GP22_SLEEP \
do{ \
    SPCTL = 0x00; \
    GPIO_SET_L(GP22_RST_PORT, GP22_RST_PIN); \
    GPIO_SET_L(GP22_CSN_PORT, GP22_CSN_PIN); \
    GPIO_SET_L(GP22_SCLK_PORT, GP22_SCLK_PIN); \
    GPIO_SET_L(GP22_MOSI_PORT, GP22_MOSI_PIN); \
    GPIO_SET_L(GP22_EN_PORT, GP22_EN_PIN); \
    GPIO_SET_L(GP22_MISO_PORT, GP22_MISO_PIN); \
    GPIO_SET_L(GP22_INT_PORT, GP22_INT_PIN); \
} while(0)



/* Opcode define **************************************************************/
#define GP22_OPCODE_INIT                0x70
#define GP22_OPCODE_RESET               0x50
#define GP22_OPCODE_START_TOF           0x01
#define GP22_OPCODE_START_TEMP          0x02
#define GP22_OPCODE_CALC_HSC            0x03
#define GP22_OPCODE_START_CAL_TOF       0x04
#define GP22_OPCODE_START_TOF2          0x05
#define GP22_OPCODE_START_TEMP2         0x06

#define GP22_OPCODE_WRITE_REG           0x80
#define GP22_OPCODE_READ_REG            0xB0
#define GP22_OPCODE_READ_ID             0xB7
#define GP22_OPCODE_WRITE_E2            0xC0
#define GP22_OPCODE_TRANS_E2            0xF0
#define GP22_OPCODE_COMPARE_E2          0xC6

#define GP22_REGADDR_STATUS             0x04
#define GP22_REGADDR_TEST               0x05
#define GP22_REGADDR_PW1ST              0x05

/* Default register values on reset *******************************************/
#define GP22_CFG_DEFAULT0               0x22066800
#define GP22_CFG_DEFAULT1               0x55400000
#define GP22_CFG_DEFAULT2               0x20000000
#define GP22_CFG_DEFAULT3               0x18000000
#define GP22_CFG_DEFAULT4               0x20000000
#define GP22_CFG_DEFAULT5               0x00000000
#define GP22_CFG_DEFAULT6               0x00000000

/* Blank register values except for the "keep default" values  ****************/
#define GP22_CFG_KEEP_DEFAULT0          0x00000000
#define GP22_CFG_KEEP_DEFAULT1          0x00400000
#define GP22_CFG_KEEP_DEFAULT2          0x00000000
#define GP22_CFG_KEEP_DEFAULT3          0x00000000
#define GP22_CFG_KEEP_DEFAULT4          0x20000000
#define GP22_CFG_KEEP_DEFAULT5          0x00000000
#define GP22_CFG_KEEP_DEFAULT6          0x00000000


/* Register definition ********************************************************/
#define GP22_CFG0_ID0_0                 ALGO_BITMASK(0)
#define GP22_CFG0_ID0_1                 ALGO_BITMASK(1)
#define GP22_CFG0_ID0_2                 ALGO_BITMASK(2)
#define GP22_CFG0_ID0_3                 ALGO_BITMASK(3)
#define GP22_CFG0_ID0_4                 ALGO_BITMASK(4)
#define GP22_CFG0_ID0_5                 ALGO_BITMASK(5)
#define GP22_CFG0_ID0_6                 ALGO_BITMASK(6)
#define GP22_CFG0_ID0_7                 ALGO_BITMASK(7)
#define GP22_CFG0_NEG_START             ALGO_BITMASK(8)
#define GP22_CFG0_NEG_STOP1             ALGO_BITMASK(9)
#define GP22_CFG0_NEG_STOP2             ALGO_BITMASK(10)
#define GP22_CFG0_MESSB2                ALGO_BITMASK(11)
#define GP22_CFG0_NO_CAL_AUTO           ALGO_BITMASK(12)
#define GP22_CFG0_CALIBRATE             ALGO_BITMASK(13)
#define GP22_CFG0_SEL_ECLK_TEMP         ALGO_BITMASK(14)
#define GP22_CFG0_ANZ_FAKE              ALGO_BITMASK(15)
#define GP22_CFG0_TCYCLE                ALGO_BITMASK(16)
#define GP22_CFG0_ANZ_PORT              ALGO_BITMASK(17)
#define GP22_CFG0_START_CLKHS_0         ALGO_BITMASK(18)
#define GP22_CFG0_START_CLKHS_1         ALGO_BITMASK(19)
#define GP22_CFG0_DIV_CLKHS_0           ALGO_BITMASK(20)
#define GP22_CFG0_DIV_CLKHS_1           ALGO_BITMASK(21)
#define GP22_CFG0_ANZ_PER_CALRES_0      ALGO_BITMASK(22)
#define GP22_CFG0_ANZ_PER_CALRES_1      ALGO_BITMASK(23)
#define GP22_CFG0_DIV_FIRE_0            ALGO_BITMASK(24)
#define GP22_CFG0_DIV_FIRE_1            ALGO_BITMASK(25)
#define GP22_CFG0_DIV_FIRE_2            ALGO_BITMASK(26)
#define GP22_CFG0_DIV_FIRE_3            ALGO_BITMASK(27)
#define GP22_CFG0_ANZ_FIRE_0            ALGO_BITMASK(28)
#define GP22_CFG0_ANZ_FIRE_1            ALGO_BITMASK(29)
#define GP22_CFG0_ANZ_FIRE_2            ALGO_BITMASK(30)
#define GP22_CFG0_ANZ_FIRE_3            ALGO_BITMASK(31)

#define GP22_CFG1_ID1_0                 ALGO_BITMASK(0)
#define GP22_CFG1_ID1_1                 ALGO_BITMASK(1)
#define GP22_CFG1_ID1_2                 ALGO_BITMASK(2)
#define GP22_CFG1_ID1_3                 ALGO_BITMASK(3)
#define GP22_CFG1_ID1_4                 ALGO_BITMASK(4)
#define GP22_CFG1_ID1_5                 ALGO_BITMASK(5)
#define GP22_CFG1_ID1_6                 ALGO_BITMASK(6)
#define GP22_CFG1_ID1_7                 ALGO_BITMASK(7)
#define GP22_CFG1_SEL_TSTO1_0           ALGO_BITMASK(8)
#define GP22_CFG1_SEL_TSTO1_1           ALGO_BITMASK(9)
#define GP22_CFG1_SEL_TSTO1_2           ALGO_BITMASK(10)
#define GP22_CFG1_SEL_TSTO2_0           ALGO_BITMASK(11)
#define GP22_CFG1_SEL_TSTO2_1           ALGO_BITMASK(12)
#define GP22_CFG1_SEL_TSTO2_2           ALGO_BITMASK(13)
#define GP22_CFG1_SEL_START_FIRE        ALGO_BITMASK(14)
#define GP22_CFG1_CURR32K               ALGO_BITMASK(15)
#define GP22_CFG1_HITIN1_0              ALGO_BITMASK(16)
#define GP22_CFG1_HITIN1_1              ALGO_BITMASK(17)
#define GP22_CFG1_HITIN1_2              ALGO_BITMASK(18)
#define GP22_CFG1_HITIN2_0              ALGO_BITMASK(19)
#define GP22_CFG1_HITIN2_1              ALGO_BITMASK(20)
#define GP22_CFG1_HITIN2_2              ALGO_BITMASK(21)
#define GP22_CFG1_KEEP_DEFAULT          ALGO_BITMASK(22)
#define GP22_CFG1_EN_FAST_INIT          ALGO_BITMASK(23)
#define GP22_CFG1_HIT1_0                ALGO_BITMASK(24)
#define GP22_CFG1_HIT1_1                ALGO_BITMASK(25)
#define GP22_CFG1_HIT1_2                ALGO_BITMASK(26)
#define GP22_CFG1_HIT1_3                ALGO_BITMASK(27)
#define GP22_CFG1_HIT2_0                ALGO_BITMASK(28)
#define GP22_CFG1_HIT2_1                ALGO_BITMASK(29)
#define GP22_CFG1_HIT2_2                ALGO_BITMASK(30)
#define GP22_CFG1_HIT2_3                ALGO_BITMASK(31)

#define GP22_CFG2_ID2_0                 ALGO_BITMASK(0)
#define GP22_CFG2_ID2_1                 ALGO_BITMASK(1)
#define GP22_CFG2_ID2_2                 ALGO_BITMASK(2)
#define GP22_CFG2_ID2_3                 ALGO_BITMASK(3)
#define GP22_CFG2_ID2_4                 ALGO_BITMASK(4)
#define GP22_CFG2_ID2_5                 ALGO_BITMASK(5)
#define GP22_CFG2_ID2_6                 ALGO_BITMASK(6)
#define GP22_CFG2_ID2_7                 ALGO_BITMASK(7)
#define GP22_CFG2_DELVAL1_0             ALGO_BITMASK(8)
#define GP22_CFG2_DELVAL1_1             ALGO_BITMASK(9)
#define GP22_CFG2_DELVAL1_2             ALGO_BITMASK(10)
#define GP22_CFG2_DELVAL1_3             ALGO_BITMASK(11)
#define GP22_CFG2_DELVAL1_4             ALGO_BITMASK(12)
#define GP22_CFG2_DELVAL1_5             ALGO_BITMASK(13)
#define GP22_CFG2_DELVAL1_6             ALGO_BITMASK(14)
#define GP22_CFG2_DELVAL1_7             ALGO_BITMASK(15)
#define GP22_CFG2_DELVAL1_8             ALGO_BITMASK(16)
#define GP22_CFG2_DELVAL1_9             ALGO_BITMASK(17)
#define GP22_CFG2_DELVAL1_10            ALGO_BITMASK(18)
#define GP22_CFG2_DELVAL1_11            ALGO_BITMASK(19)
#define GP22_CFG2_DELVAL1_12            ALGO_BITMASK(20)
#define GP22_CFG2_DELVAL1_13            ALGO_BITMASK(21)
#define GP22_CFG2_DELVAL1_14            ALGO_BITMASK(22)
#define GP22_CFG2_DELVAL1_15            ALGO_BITMASK(23)
#define GP22_CFG2_DELVAL1_16            ALGO_BITMASK(24)
#define GP22_CFG2_DELVAL1_17            ALGO_BITMASK(25)
#define GP22_CFG2_DELVAL1_18            ALGO_BITMASK(26)
#define GP22_CFG2_RFEDGE1               ALGO_BITMASK(27)
#define GP22_CFG2_RFEDGE2               ALGO_BITMASK(28)
#define GP22_CFG2_EN_INT_ALU            ALGO_BITMASK(29)
#define GP22_CFG2_EN_INT_HITS           ALGO_BITMASK(30)
#define GP22_CFG2_EN_INT_TDC_TIMEOUT    ALGO_BITMASK(31)

#define GP22_CFG3_ID3_0                 ALGO_BITMASK(0)
#define GP22_CFG3_ID3_1                 ALGO_BITMASK(1)
#define GP22_CFG3_ID3_2                 ALGO_BITMASK(2)
#define GP22_CFG3_ID3_3                 ALGO_BITMASK(3)
#define GP22_CFG3_ID3_4                 ALGO_BITMASK(4)
#define GP22_CFG3_ID3_5                 ALGO_BITMASK(5)
#define GP22_CFG3_ID3_6                 ALGO_BITMASK(6)
#define GP22_CFG3_ID3_7                 ALGO_BITMASK(7)
#define GP22_CFG3_DELVAL2_0             ALGO_BITMASK(8)
#define GP22_CFG3_DELVAL2_1             ALGO_BITMASK(9)
#define GP22_CFG3_DELVAL2_2             ALGO_BITMASK(10)
#define GP22_CFG3_DELVAL2_3             ALGO_BITMASK(11)
#define GP22_CFG3_DELVAL2_4             ALGO_BITMASK(12)
#define GP22_CFG3_DELVAL2_5             ALGO_BITMASK(13)
#define GP22_CFG3_DELVAL2_6             ALGO_BITMASK(14)
#define GP22_CFG3_DELVAL2_7             ALGO_BITMASK(15)
#define GP22_CFG3_DELVAL2_8             ALGO_BITMASK(16)
#define GP22_CFG3_DELVAL2_9             ALGO_BITMASK(17)
#define GP22_CFG3_DELVAL2_10            ALGO_BITMASK(18)
#define GP22_CFG3_DELVAL2_11            ALGO_BITMASK(19)
#define GP22_CFG3_DELVAL2_12            ALGO_BITMASK(20)
#define GP22_CFG3_DELVAL2_13            ALGO_BITMASK(21)
#define GP22_CFG3_DELVAL2_14            ALGO_BITMASK(22)
#define GP22_CFG3_DELVAL2_15            ALGO_BITMASK(23)
#define GP22_CFG3_DELVAL2_16            ALGO_BITMASK(24)
#define GP22_CFG3_DELVAL2_17            ALGO_BITMASK(25)
#define GP22_CFG3_DELVAL2_18            ALGO_BITMASK(26)
#define GP22_CFG3_SEL_TIMO_MB2_0        ALGO_BITMASK(27)
#define GP22_CFG3_SEL_TIMO_MB2_1        ALGO_BITMASK(28)
#define GP22_CFG3_EN_ERR_VAL            ALGO_BITMASK(29)
#define GP22_CFG3_EN_FIRST_WAVE         ALGO_BITMASK(30)
#define GP22_CFG3_EN_AUTOCALC_MB2       ALGO_BITMASK(31)

#define GP22_CFG4_ID4_0                 ALGO_BITMASK(0)
#define GP22_CFG4_ID4_1                 ALGO_BITMASK(1)
#define GP22_CFG4_ID4_2                 ALGO_BITMASK(2)
#define GP22_CFG4_ID4_3                 ALGO_BITMASK(3)
#define GP22_CFG4_ID4_4                 ALGO_BITMASK(4)
#define GP22_CFG4_ID4_5                 ALGO_BITMASK(5)
#define GP22_CFG4_ID4_6                 ALGO_BITMASK(6)
#define GP22_CFG4_ID4_7                 ALGO_BITMASK(7)
#define GP22_CFG4_DELVAL3_0             ALGO_BITMASK(8)
#define GP22_CFG4_DELVAL3_1             ALGO_BITMASK(9)
#define GP22_CFG4_DELVAL3_2             ALGO_BITMASK(10)
#define GP22_CFG4_DELVAL3_3             ALGO_BITMASK(11)
#define GP22_CFG4_DELVAL3_4             ALGO_BITMASK(12)
#define GP22_CFG4_DELVAL3_5             ALGO_BITMASK(13)
#define GP22_CFG4_DELVAL3_6             ALGO_BITMASK(14)
#define GP22_CFG4_DELVAL3_7             ALGO_BITMASK(15)
#define GP22_CFG4_DELVAL3_8             ALGO_BITMASK(16)
#define GP22_CFG4_DELVAL3_9             ALGO_BITMASK(17)
#define GP22_CFG4_DELVAL3_10            ALGO_BITMASK(18)
#define GP22_CFG4_DELVAL3_11            ALGO_BITMASK(19)
#define GP22_CFG4_DELVAL3_12            ALGO_BITMASK(20)
#define GP22_CFG4_DELVAL3_13            ALGO_BITMASK(21)
#define GP22_CFG4_DELVAL3_14            ALGO_BITMASK(22)
#define GP22_CFG4_DELVAL3_15            ALGO_BITMASK(23)
#define GP22_CFG4_DELVAL3_16            ALGO_BITMASK(24)
#define GP22_CFG4_DELVAL3_17            ALGO_BITMASK(25)
#define GP22_CFG4_DELVAL3_18            ALGO_BITMASK(26)
#define GP22_CFG4_KEEP_DEFAULT_0        ALGO_BITMASK(27)
#define GP22_CFG4_KEEP_DEFAULT_1        ALGO_BITMASK(28)
#define GP22_CFG4_KEEP_DEFAULT_2        ALGO_BITMASK(29)
#define GP22_CFG4_KEEP_DEFAULT_3        ALGO_BITMASK(30)
#define GP22_CFG4_KEEP_DEFAULT_4        ALGO_BITMASK(31)

#define GP22_CFG3FW_ID3_0               ALGO_BITMASK(0)
#define GP22_CFG3FW_ID3_1               ALGO_BITMASK(1)
#define GP22_CFG3FW_ID3_2               ALGO_BITMASK(2)
#define GP22_CFG3FW_ID3_3               ALGO_BITMASK(3)
#define GP22_CFG3FW_ID3_4               ALGO_BITMASK(4)
#define GP22_CFG3FW_ID3_5               ALGO_BITMASK(5)
#define GP22_CFG3FW_ID3_6               ALGO_BITMASK(6)
#define GP22_CFG3FW_ID3_7               ALGO_BITMASK(7)
#define GP22_CFG3FW_DELREL1_0           ALGO_BITMASK(8)
#define GP22_CFG3FW_DELREL1_1           ALGO_BITMASK(9)
#define GP22_CFG3FW_DELREL1_2           ALGO_BITMASK(10)
#define GP22_CFG3FW_DELREL1_3           ALGO_BITMASK(11)
#define GP22_CFG3FW_DELREL1_4           ALGO_BITMASK(12)
#define GP22_CFG3FW_DELREL1_5           ALGO_BITMASK(13)
#define GP22_CFG3FW_DELREL2_0           ALGO_BITMASK(14)
#define GP22_CFG3FW_DELREL2_1           ALGO_BITMASK(15)
#define GP22_CFG3FW_DELREL2_2           ALGO_BITMASK(16)
#define GP22_CFG3FW_DELREL2_3           ALGO_BITMASK(17)
#define GP22_CFG3FW_DELREL2_4           ALGO_BITMASK(18)
#define GP22_CFG3FW_DELREL2_5           ALGO_BITMASK(19)
#define GP22_CFG3FW_DELREL3_0           ALGO_BITMASK(20)
#define GP22_CFG3FW_DELREL3_1           ALGO_BITMASK(21)
#define GP22_CFG3FW_DELREL3_2           ALGO_BITMASK(22)
#define GP22_CFG3FW_DELREL3_3           ALGO_BITMASK(23)
#define GP22_CFG3FW_DELREL3_4           ALGO_BITMASK(24)
#define GP22_CFG3FW_DELREL3_5           ALGO_BITMASK(25)
#define GP22_CFG3FW_KEEP_DEFAULT        ALGO_BITMASK(26)
#define GP22_CFG3FW_SEL_TIMO_MB2_0      ALGO_BITMASK(27)
#define GP22_CFG3FW_SEL_TIMO_MB2_1      ALGO_BITMASK(28)
#define GP22_CFG3FW_EN_ERR_VAL          ALGO_BITMASK(29)
#define GP22_CFG3FW_EN_FIRST_WAVE       ALGO_BITMASK(30)
#define GP22_CFG3FW_EN_AUTOCALC_MB2     ALGO_BITMASK(31)

#define GP22_CFG4FW_ID4_0               ALGO_BITMASK(0)
#define GP22_CFG4FW_ID4_1               ALGO_BITMASK(1)
#define GP22_CFG4FW_ID4_2               ALGO_BITMASK(2)
#define GP22_CFG4FW_ID4_3               ALGO_BITMASK(3)
#define GP22_CFG4FW_ID4_4               ALGO_BITMASK(4)
#define GP22_CFG4FW_ID4_5               ALGO_BITMASK(5)
#define GP22_CFG4FW_ID4_6               ALGO_BITMASK(6)
#define GP22_CFG4FW_ID4_7               ALGO_BITMASK(7)
#define GP22_CFG4FW_OFFS_0              ALGO_BITMASK(8)
#define GP22_CFG4FW_OFFS_1              ALGO_BITMASK(9)
#define GP22_CFG4FW_OFFS_2              ALGO_BITMASK(10)
#define GP22_CFG4FW_OFFS_3              ALGO_BITMASK(11)
#define GP22_CFG4FW_OFFS_4              ALGO_BITMASK(12)
#define GP22_CFG4FW_OFFSRNG1            ALGO_BITMASK(13)
#define GP22_CFG4FW_OFFSRNG2            ALGO_BITMASK(14)
#define GP22_CFG4FW_EDGE_FW             ALGO_BITMASK(15)
#define GP22_CFG4FW_DIS_PW              ALGO_BITMASK(16)
#define GP22_CFG4FW_KEEP_DEFAULT_0      ALGO_BITMASK(17)
#define GP22_CFG4FW_KEEP_DEFAULT_1      ALGO_BITMASK(18)
#define GP22_CFG4FW_KEEP_DEFAULT_2      ALGO_BITMASK(19)
#define GP22_CFG4FW_KEEP_DEFAULT_3      ALGO_BITMASK(20)
#define GP22_CFG4FW_KEEP_DEFAULT_4      ALGO_BITMASK(21)
#define GP22_CFG4FW_KEEP_DEFAULT_5      ALGO_BITMASK(22)
#define GP22_CFG4FW_KEEP_DEFAULT_6      ALGO_BITMASK(23)
#define GP22_CFG4FW_KEEP_DEFAULT_7      ALGO_BITMASK(24)
#define GP22_CFG4FW_KEEP_DEFAULT_8      ALGO_BITMASK(25)
#define GP22_CFG4FW_KEEP_DEFAULT_9      ALGO_BITMASK(26)
#define GP22_CFG4FW_KEEP_DEFAULT_10     ALGO_BITMASK(27)
#define GP22_CFG4FW_KEEP_DEFAULT_11     ALGO_BITMASK(28)
#define GP22_CFG4FW_KEEP_DEFAULT_12     ALGO_BITMASK(29)
#define GP22_CFG4FW_KEEP_DEFAULT_13     ALGO_BITMASK(30)
#define GP22_CFG4FW_KEEP_DEFAULT_14     ALGO_BITMASK(31)

#define GP22_CFG5_ID5_0                 ALGO_BITMASK(0)
#define GP22_CFG5_ID5_1                 ALGO_BITMASK(1)
#define GP22_CFG5_ID5_2                 ALGO_BITMASK(2)
#define GP22_CFG5_ID5_3                 ALGO_BITMASK(3)
#define GP22_CFG5_ID5_4                 ALGO_BITMASK(4)
#define GP22_CFG5_ID5_5                 ALGO_BITMASK(5)
#define GP22_CFG5_ID5_6                 ALGO_BITMASK(6)
#define GP22_CFG5_ID5_7                 ALGO_BITMASK(7)
#define GP22_CFG5_PHFIRE_0              ALGO_BITMASK(8)
#define GP22_CFG5_PHFIRE_1              ALGO_BITMASK(9)
#define GP22_CFG5_PHFIRE_2              ALGO_BITMASK(10)
#define GP22_CFG5_PHFIRE_3              ALGO_BITMASK(11)
#define GP22_CFG5_PHFIRE_4              ALGO_BITMASK(12)
#define GP22_CFG5_PHFIRE_5              ALGO_BITMASK(13)
#define GP22_CFG5_PHFIRE_6              ALGO_BITMASK(14)
#define GP22_CFG5_PHFIRE_7              ALGO_BITMASK(15)
#define GP22_CFG5_PHFIRE_8              ALGO_BITMASK(16)
#define GP22_CFG5_PHFIRE_9              ALGO_BITMASK(17)
#define GP22_CFG5_PHFIRE_10             ALGO_BITMASK(18)
#define GP22_CFG5_PHFIRE_11             ALGO_BITMASK(19)
#define GP22_CFG5_PHFIRE_12             ALGO_BITMASK(20)
#define GP22_CFG5_PHFIRE_13             ALGO_BITMASK(21)
#define GP22_CFG5_PHFIRE_14             ALGO_BITMASK(22)
#define GP22_CFG5_PHFIRE_15             ALGO_BITMASK(23)
#define GP22_CFG5_REPEAT_FIRE_0         ALGO_BITMASK(24)
#define GP22_CFG5_REPEAT_FIRE_1         ALGO_BITMASK(25)
#define GP22_CFG5_REPEAT_FIRE_2         ALGO_BITMASK(26)
#define GP22_CFG5_DIS_PHASESHIFT        ALGO_BITMASK(27)
#define GP22_CFG5_EN_STARTNOISE         ALGO_BITMASK(28)
#define GP22_CFG5_CON_FIRE_DOWN         ALGO_BITMASK(29)
#define GP22_CFG5_CON_FIRE_UP           ALGO_BITMASK(30)
#define GP22_CFG5_CON_FIRE_BOTH         ALGO_BITMASK(31)

#define GP22_CFG6_ID6_0                 ALGO_BITMASK(0)
#define GP22_CFG6_ID6_1                 ALGO_BITMASK(1)
#define GP22_CFG6_ID6_2                 ALGO_BITMASK(2)
#define GP22_CFG6_ID6_3                 ALGO_BITMASK(3)
#define GP22_CFG6_ID6_4                 ALGO_BITMASK(4)
#define GP22_CFG6_ID6_5                 ALGO_BITMASK(5)
#define GP22_CFG6_ID6_6                 ALGO_BITMASK(6)
#define GP22_CFG6_ID6_7                 ALGO_BITMASK(7)
#define GP22_CFG6_ANZ_FIRE_END_0        ALGO_BITMASK(8)
#define GP22_CFG6_ANZ_FIRE_END_1        ALGO_BITMASK(9)
#define GP22_CFG6_ANZ_FIRE_END_2        ALGO_BITMASK(10)
#define GP22_CFG6_TEMP_PORTDIR          ALGO_BITMASK(11)
#define GP22_CFG6_DOUBLE_RES            ALGO_BITMASK(12)
#define GP22_CFG6_QUAD_RES              ALGO_BITMASK(13)
#define GP22_CFG6_FIREO_DEF             ALGO_BITMASK(14)
#define GP22_CFG6_HZ60                  ALGO_BITMASK(15)
#define GP22_CFG6_CYCLE_TOF_0           ALGO_BITMASK(16)
#define GP22_CFG6_CYCLE_TOF_1           ALGO_BITMASK(17)
#define GP22_CFG6_CYCLE_TEMP_0          ALGO_BITMASK(18)
#define GP22_CFG6_CYCLE_TEMP_1          ALGO_BITMASK(19)
#define GP22_CFG6_START_CLKHS_END       ALGO_BITMASK(20)
#define GP22_CFG6_EN_INT_END            ALGO_BITMASK(21)
#define GP22_CFG6_TW2_0                 ALGO_BITMASK(22)
#define GP22_CFG6_TW2_1                 ALGO_BITMASK(23)
#define GP22_CFG6_EMPTY_0               ALGO_BITMASK(24)
#define GP22_CFG6_DA_KORR_0             ALGO_BITMASK(25)
#define GP22_CFG6_DA_KORR_1             ALGO_BITMASK(26)
#define GP22_CFG6_DA_KORR_2             ALGO_BITMASK(27)
#define GP22_CFG6_DA_KORR_3             ALGO_BITMASK(28)
#define GP22_CFG6_EMPTY_1               ALGO_BITMASK(29)
#define GP22_CFG6_NEG_STOP_TEMP         ALGO_BITMASK(30)
#define GP22_CFG6_EN_ANALOG             ALGO_BITMASK(31)



#endif /* __GP22_ATY_H */

/******************************** End Of File *********************************/