fw_cid_stc8h.h 4.3 KB

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  1. // Copyright 2021 IOsetting <iosetting(at)outlook.com>
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #ifndef __FW_CID_STC8H_H__
  15. #define __FW_CID_STC8H_H__
  16. #include "fw_reg_base.h"
  17. #if (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K08 )
  18. #define __CID_ADDR 0x1FE7
  19. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K12 )
  20. #define __CID_ADDR 0x2FE7
  21. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K16 )
  22. #define __CID_ADDR 0x3FE7
  23. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K17 )
  24. #define __CID_ADDR 0x43E7
  25. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K24 )
  26. #define __CID_ADDR 0x5FE7
  27. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K28 )
  28. #define __CID_ADDR 0x6FE7
  29. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H1K33 )
  30. #define __CID_ADDR 0x83E7
  31. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K32S4 ) || \
  32. (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K32S2 ) || \
  33. (__CONF_MCU_MODEL == MCU_MODEL_STC8H2K32T ) || \
  34. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K32TLR ) || \
  35. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K32TLCD ) || \
  36. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K32LCD ) || \
  37. (__CONF_MCU_MODEL == MCU_MODEL_STC8H8K32U )
  38. #define __CID_ADDR 0x7FE7
  39. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K48S4 ) || \
  40. (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K48S2 ) || \
  41. (__CONF_MCU_MODEL == MCU_MODEL_STC8H2K48T ) || \
  42. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K48TLR ) || \
  43. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K48TLCD ) || \
  44. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K48LCD ) || \
  45. (__CONF_MCU_MODEL == MCU_MODEL_STC8H8K48U )
  46. #define __CID_ADDR 0xBFE7
  47. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K60S4 ) || \
  48. (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K60S2 ) || \
  49. (__CONF_MCU_MODEL == MCU_MODEL_STC8H2K60T ) || \
  50. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K60TLR ) || \
  51. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K60TLCD ) || \
  52. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K60LCD ) || \
  53. (__CONF_MCU_MODEL == MCU_MODEL_STC8H8K60U )
  54. #define __CID_ADDR 0xEFE7
  55. #elif (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K64S4 ) || \
  56. (__CONF_MCU_MODEL == MCU_MODEL_STC8H3K64S2 ) || \
  57. (__CONF_MCU_MODEL == MCU_MODEL_STC8H2K64T ) || \
  58. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K64TLR ) || \
  59. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K64TLCD ) || \
  60. (__CONF_MCU_MODEL == MCU_MODEL_STC8H4K64LCD ) || \
  61. (__CONF_MCU_MODEL == MCU_MODEL_STC8H8K64U )
  62. #define __CID_ADDR 0xFDE7
  63. #endif
  64. #define ID_ROMADDR ( (unsigned char __CODE *)(__CID_ADDR + 18)) // MCU ID 7 bytes
  65. #define VREF_ROMADDR (*(unsigned int __CODE *)(__CID_ADDR + 16)) //1.19Vref
  66. #define F32K_ROMADDR (*(unsigned int __CODE *)(__CID_ADDR + 14)) //32kHz frequency
  67. #define T22M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 13)) //22.1184MHz (20M)
  68. #define T24M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 12)) //24MHz (20M)
  69. #define T20M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 11)) //20MHz (20M)
  70. #define T27M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 10)) //27MHz (35M)
  71. #define T30M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 9)) //30MHz (35M)
  72. #define T33M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 8)) //33.1776MHz (35M)
  73. #define T35M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 7)) //35MHz (35M)
  74. #define T36M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 6)) //36.864MHz (35M)
  75. #define T40M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 5)) //
  76. #define T45M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 4)) //
  77. #define VRT20M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 3)) //VRTRIM of IRCBAND 0
  78. #define VRT35M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 2)) //VRTRIM of IRCBAND 1
  79. #define VRT24M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 1)) //VRTRIM of IRCBAND 2
  80. #define VRT40M_ROMADDR (*(unsigned char __CODE *)(__CID_ADDR + 0)) //VRTRIM of IRCBAND 3
  81. #endif