fw_iap.h 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. // Copyright 2021 IOsetting <iosetting(at)outlook.com>
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #ifndef ___FW_IAP_H___
  15. #define ___FW_IAP_H___
  16. #include "fw_conf.h"
  17. #include "fw_types.h"
  18. /**
  19. * EEPROM size and IAP address of different series
  20. *
  21. * | LINE | SIZE | ADDR START | ADDR END |
  22. * | --------- | --- | ----- | ----- |
  23. * | STC8G1K08 | 4K | 0x0000 | 0x0FFF |
  24. * | STC8G1K08-8Pin | 4K | 0x0000 | 0x0FFF |
  25. * | STC8G1K08A | 4K | 0x0000 | 0x0FFF |
  26. * | STC8G1K08T | 4K | 0x0000 | 0x0FFF |
  27. * | STC8G2K60S4 | 4K | 0x0000 | 0x0FFF |
  28. * | STC8G2K60S2 | 4K | 0x0000 | 0x0FFF |
  29. * | STC8H1K08 | 4K | 0x0000 | 0x0FFF |
  30. * | STC8H1K24 | 4K | 0x0000 | 0x0FFF |
  31. * | STC8H3K60S2 | 4K | 0x0000 | 0x0FFF |
  32. * | STC8H3K60S4 | 4K | 0x0000 | 0x0FFF |
  33. * | STC8H8K60U | 4K | 0x0000 | 0x0FFF |
  34. * | STC8G1K04 | 8K | 0x0000 | 0x1FFF |
  35. * | STC8H1K16 | 12K | 0x0000 | 0x2FFF |
  36. * | STC8H3K48S2 | 16K | 0x0000 | 0x3FFF |
  37. * | STC8H3K48S4 | 16K | 0x0000 | 0x3FFF |
  38. * | STC8H8K48U | 16K | 0x0000 | 0x3FFF |
  39. * | STC8G2K48S4 | 16K | 0x0000 | 0x3FFF |
  40. * | STC8G2K48S2 | 16K | 0x0000 | 0x3FFF |
  41. * | STC8H3K32S2 | 32K | 0x0000 | 0x7FFF |
  42. * | STC8H3K32S4 | 32K | 0x0000 | 0x7FFF |
  43. * | STC8H8K32U | 32K | 0x0000 | 0x7FFF |
  44. * | STC8G2K32S4 | 32K | 0x0000 | 0x7FFF |
  45. * | STC8G2K32S2 | 32K | 0x0000 | 0x7FFF |
  46. *
  47. */
  48. typedef enum
  49. {
  50. IAP_RestartFrom_UserCode = 0x00,
  51. IAP_RestartFrom_ISPCode = 0x01,
  52. } IAP_RestartFrom_t;
  53. #define IAP_SetWaitTime() (IAP_TPS = (uint8_t)(__CONF_FOSC / 1000000UL))
  54. #define IAP_ReadData() (IAP_DATA)
  55. #define IAP_WriteData(__BYTE__) (IAP_DATA = (__BYTE__))
  56. /**
  57. * Set cmd to idle
  58. */
  59. #define IAP_SetIdle() (IAP_CMD = IAP_CMD & ~(0x03))
  60. /**
  61. * Read one byte
  62. */
  63. #define IAP_CmdRead(__16BIT_ADDR__) do{ \
  64. EA = 0; \
  65. IAP_ADDRH = ((__16BIT_ADDR__) >> 8); \
  66. IAP_ADDRL = ((__16BIT_ADDR__) & 0xFF); \
  67. IAP_CMD = IAP_CMD & ~(0x03) | 0x01; \
  68. IAP_TRIG = 0x5A; \
  69. IAP_TRIG = 0xA5; \
  70. NOP();NOP(); \
  71. IAP_SetIdle(); \
  72. EA = 1; \
  73. }while(0)
  74. /**
  75. * Write one byte, 1->0 only
  76. */
  77. #define IAP_CmdWrite(__16BIT_ADDR__) do{ \
  78. EA = 0; \
  79. IAP_ADDRH = ((__16BIT_ADDR__) >> 8); \
  80. IAP_ADDRL = ((__16BIT_ADDR__) & 0xFF); \
  81. IAP_CMD = IAP_CMD & ~(0x03) | 0x02; \
  82. IAP_TRIG = 0x5A; \
  83. IAP_TRIG = 0xA5; \
  84. NOP();NOP(); \
  85. IAP_SetIdle(); \
  86. EA = 1; \
  87. }while(0)
  88. /**
  89. * Erase one section (512 bytes), set all bytes to 0xFF
  90. */
  91. #define IAP_CmdErase(__16BIT_ADDR__) do{ \
  92. EA = 0; \
  93. IAP_ADDRH = ((__16BIT_ADDR__) >> 8); \
  94. IAP_ADDRL = ((__16BIT_ADDR__) & 0xFF); \
  95. IAP_CMD = IAP_CMD & ~(0x03) | 0x03; \
  96. IAP_TRIG = 0x5A; \
  97. IAP_TRIG = 0xA5; \
  98. NOP();NOP(); \
  99. IAP_SetIdle(); \
  100. EA = 1; \
  101. }while(0)
  102. #define IAP_SetEnabled(__STATE__) SFR_ASSIGN(IAP_CONTR, 7, __STATE__)
  103. #define IAP_SetRestartFrom(__FROM__) SFR_ASSIGN(IAP_CONTR, 6, __FROM__)
  104. #define IAP_SoftReset() SFR_SET(IAP_CONTR, 5)
  105. #define IAP_IsCmdFailed() (IAP_CONTR & (0x01 << 4))
  106. #define IAP_ClearCmdFailFlag() SFR_RESET(IAP_CONTR, 4)
  107. #endif