fw_usb.h 7.9 KB

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  1. // Copyright 2021 IOsetting <iosetting(at)outlook.com>
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #ifndef ___FW_USB_H___
  15. #define ___FW_USB_H___
  16. #include "fw_conf.h"
  17. #include "fw_types.h"
  18. /**
  19. * STC8H8K64U USB SFR
  20. */
  21. #define FADDR 0x00
  22. #define POWER 0x01
  23. #define INTRIN1 0x02
  24. #define EP5INIF 0x20
  25. #define EP4INIF 0x10
  26. #define EP3INIF 0x08
  27. #define EP2INIF 0x04
  28. #define EP1INIF 0x02
  29. #define EP0IF 0x01
  30. #define INTROUT1 0x04
  31. #define EP5OUTIF 0x20
  32. #define EP4OUTIF 0x10
  33. #define EP3OUTIF 0x08
  34. #define EP2OUTIF 0x04
  35. #define EP1OUTIF 0x02
  36. #define INTRUSB 0x06
  37. #define SOFIF 0x08
  38. #define RSTIF 0x04
  39. #define RSUIF 0x02
  40. #define SUSIF 0x01
  41. #define INTRIN1E 0x07
  42. #define EP5INIE 0x20
  43. #define EP4INIE 0x10
  44. #define EP3INIE 0x08
  45. #define EP2INIE 0x04
  46. #define EP1INIE 0x02
  47. #define EP0IE 0x01
  48. #define INTROUT1E 0x09
  49. #define EP5OUTIE 0x20
  50. #define EP4OUTIE 0x10
  51. #define EP3OUTIE 0x08
  52. #define EP2OUTIE 0x04
  53. #define EP1OUTIE 0x02
  54. #define INTRUSBE 0x0B
  55. #define SOFIE 0x08
  56. #define RSTIE 0x04
  57. #define RSUIE 0x02
  58. #define SUSIE 0x01
  59. #define FRAME1 0x0C
  60. #define FRAME2 0x0D
  61. #define INDEX 0x0E
  62. #define INMAXP 0x10
  63. #define CSR0 0x11
  64. #define SSUEND 0x80 // Serviced Setup End
  65. #define SOPRDY 0x40 // Serviced OPRDY(Out Packet Ready)
  66. #define SDSTL 0x20 // Send Stall
  67. #define SUEND 0x10 // Setup End
  68. #define DATEND 0x08 // Data End
  69. #define STSTL 0x04 // Sent Stall
  70. #define IPRDY 0x02 // In Packet Ready
  71. #define OPRDY 0x01 // Out Packet Ready
  72. #define INCSR1 0x11
  73. #define INCLRDT 0x40
  74. #define INSTSTL 0x20
  75. #define INSDSTL 0x10
  76. #define INFLUSH 0x08
  77. #define INUNDRUN 0x04
  78. #define INFIFONE 0x02
  79. #define INIPRDY 0x01
  80. #define INCSR2 0x12
  81. #define INAUTOSET 0x80
  82. #define INISO 0x40
  83. #define INMODEIN 0x20
  84. #define INMODEOUT 0x00
  85. #define INENDMA 0x10
  86. #define INFCDT 0x08
  87. #define OUTMAXP 0x13
  88. #define OUTCSR1 0x14
  89. #define OUTCLRDT 0x80
  90. #define OUTSTSTL 0x40
  91. #define OUTSDSTL 0x20
  92. #define OUTFLUSH 0x10
  93. #define OUTDATERR 0x08
  94. #define OUTOVRRUN 0x04
  95. #define OUTFIFOFUL 0x02
  96. #define OUTOPRDY 0x01
  97. #define OUTCSR2 0x15
  98. #define OUTAUTOCLR 0x80
  99. #define OUTISO 0x40
  100. #define OUTENDMA 0x20
  101. #define OUTDMAMD 0x10
  102. #define COUNT0 0x16
  103. #define OUTCOUNT1 0x16
  104. #define OUTCOUNT2 0x17
  105. #define FIFO0 0x20
  106. #define FIFO1 0x21
  107. #define FIFO2 0x22
  108. #define FIFO3 0x23
  109. #define FIFO4 0x24
  110. #define FIFO5 0x25
  111. #define UTRKCTL 0x30
  112. #define UTRKSTS 0x31
  113. typedef enum _CONTROL_STATE
  114. {
  115. USB_CtrlState_Idle = 0x00,
  116. USB_CtrlState_SettingUp = 0x01,
  117. USB_CtrlState_DataIn = 0x02,
  118. USB_CtrlState_DataOut = 0x03,
  119. USB_CtrlState_Stalled = 0x04,
  120. } USB_CtrlState_t; /* The state machine states of a control pipe */
  121. typedef enum
  122. {
  123. USB_StdReq_GetStatus = 0x00,
  124. USB_StdReq_ClearFeature = 0x01,
  125. USB_StdReq_SetFeature = 0x03,
  126. USB_StdReq_SetAddress = 0x05,
  127. USB_StdReq_GetDescriptor = 0x06,
  128. USB_StdReq_SetDescriptor = 0x07,
  129. USB_StdReq_GetConfiguration = 0x08,
  130. USB_StdReq_SetConfiguration = 0x09,
  131. USB_StdReq_GetInterface = 0x0A,
  132. USB_StdReq_SetInterface = 0x0B,
  133. USB_StdReq_SynchFrame = 0x0C,
  134. } USB_StdReq_t;
  135. typedef enum
  136. {
  137. USB_HidReq_GetReport = 0x01,
  138. USB_HidReq_GetIdle = 0x02,
  139. USB_HidReq_GetProtocol = 0x03,
  140. USB_HidReq_SetReport = 0x09,
  141. USB_HidReq_SetIdle = 0x0A,
  142. USB_HidReq_SetProtocol = 0x0B,
  143. } USB_HidReq_t;
  144. typedef enum
  145. {
  146. USB_DescriptorType_Device = 0x01,
  147. USB_DescriptorType_Configuration = 0x02,
  148. USB_DescriptorType_String = 0x03,
  149. USB_DescriptorType_Interface = 0x04,
  150. USB_DescriptorType_Endpoint = 0x05,
  151. USB_DescriptorType_HID = 0x21,
  152. USB_DescriptorType_Report = 0x22,
  153. USB_DescriptorType_Physical = 0x23,
  154. } USB_DescriptorType_t;
  155. #define REQUEST_TYPE_MASK 0x60
  156. typedef enum
  157. {
  158. USB_RequestType_Standard = 0x00,
  159. USB_RequestType_Class = 0x20,
  160. USB_RequestType_Vendor = 0x40,
  161. } USB_RequestType_t;
  162. typedef enum
  163. {
  164. USB_ClockSource_6M = 0x00,
  165. USB_ClockSource_12M = 0x01, // default value
  166. USB_ClockSource_24M = 0x02,
  167. USB_ClockSource_IRCDiv2 = 0x03,
  168. } USB_ClockSource_t;
  169. typedef enum
  170. {
  171. USB_PHYTest_Method_Normal = 0x00,
  172. USB_PHYTest_Method_Force1 = 0x01,
  173. USB_PHYTest_Method_Force0 = 0x02,
  174. USB_PHYTest_Method_ForceOneEnd0 = 0x03,
  175. } USB_PHYTest_Method_t;
  176. #define USB_SetClockPPL(__STATE__) SFR_ASSIGN(USBCLK, 7, __STATE__)
  177. #define USB_SetClockSource(__SOURCE__) SFR_ASSIGN2BIT(USBCLK, 5, __SOURCE__)
  178. #define USB_SetClockCRE(__STATE__) SFR_ASSIGN(USBCLK, 4, __STATE__)
  179. #define USB_SetUSBTestMode(__STATE__) SFR_ASSIGN(USBCLK, 3, __STATE__)
  180. #define USB_SetPHYTestMode(__STATE__) SFR_ASSIGN(USBCLK, 2, __STATE__)
  181. #define USB_SetPHYTestMethod(__TEST_METHOD__) SFR_ASSIGN2BIT(USBCLK, 0, __TEST_METHOD__)
  182. #define USB_SetEnabled(__STATE__) SFR_ASSIGN(USBCON, 7, __STATE__)
  183. #define USB_TurnOnReset() SFR_SET(USBCON, 6)
  184. #define USB_TurnOffReset() SFR_RESET(USBCON, 6)
  185. #define USB_SetPS2Mode(__STATE__) SFR_ASSIGN(USBCON, 5, __STATE__)
  186. /**
  187. * Enable/Disable 1.5KR pull up resistance on D+ and D-
  188. */
  189. #define USB_SetDpDmPullUp(__STATE__) SFR_ASSIGN(USBCON, 4, __STATE__)
  190. /**
  191. * Enable/Disable 500KR pull down resistance on D+ and D-
  192. */
  193. #define USB_SetDpDmPullDown(__STATE__) SFR_ASSIGN(USBCON, 3, __STATE__)
  194. #define USB_GetDiffRecvMode() (USBCON & 0x04)
  195. /**
  196. * Read D+ level
  197. */
  198. #define USB_GetDp() (USBCON & 0x02)
  199. /**
  200. * Write D+ level, writable when PS2 mode is 1
  201. */
  202. #define USB_SetDp(__STATE__) SFR_ASSIGN(USBCON, 1, __STATE__)
  203. /**
  204. * Read D- level
  205. */
  206. #define USB_GetDm() (USBCON & 0x01)
  207. /**
  208. * Write D- level, writable when PS2 mode is 1
  209. */
  210. #define USB_SetDm(__STATE__) SFR_ASSIGN(USBCON, 0, __STATE__)
  211. #define USB_IsBusy() (USBADR & 0x80)
  212. #define USB_SetAddrForRead(__ADDR__) (USBADR = (__ADDR__) | 0x80)
  213. #define USB_SetAddrForWrite(__ADDR__) (USBADR = (__ADDR__) & 0x7F)
  214. #define USB_SelectEndPoint(__INDEX__) USB_WriteReg(INDEX, __INDEX__)
  215. typedef union
  216. {
  217. uint16_t w;
  218. struct _bb
  219. {
  220. uint8_t bl;
  221. uint8_t bh;
  222. } bb;
  223. } uint16_2uint8_t;
  224. typedef struct
  225. {
  226. uint8_t bmRequestType;
  227. uint8_t bRequest;
  228. uint16_2uint8_t wValue;
  229. uint16_2uint8_t wIndex;
  230. uint16_2uint8_t wLength;
  231. } USB_Request_t;
  232. typedef struct
  233. {
  234. uint8_t bStage;
  235. uint16_t wResidue;
  236. uint8_t *pData;
  237. } USB_EP0_Stage_t;
  238. uint8_t USB_ReadReg(uint8_t addr);
  239. void USB_WriteReg(uint8_t addr, uint8_t dat);
  240. uint8_t USB_ReadFIFO(uint8_t fifo, uint8_t *pdat);
  241. void USB_WriteFIFO(uint8_t fifo, uint8_t *pdat, uint8_t cnt);
  242. #endif