ATY_LIB/AT24CXX_ATY.h

/**
* @file AT24CXX_ATY.h
*
* @param Project DEVICE_GENERAL_ATY_LIB
*
* @author ATY
*
* @copyright
*       - Copyright 2017 - 2025 MZ-ATY
*       - This code follows:
*           - MZ-ATY Various Contents Joint Statement -
*               <a href="https://mengze.top/MZ-ATY_VCJS">
*                        https://mengze.top/MZ-ATY_VCJS</a>
*           - CC 4.0 BY-NC-SA -
*               <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/">
*                        https://creativecommons.org/licenses/by-nc-sa/4.0/</a>
*       - Your use will be deemed to have accepted the terms of this statement.
*
* @brief Familiar functions of AT24CXX for all embedded device
*
* @version
*       - 1_01_220602 > ATY
*           -# Preliminary version, first Release
*       - 1_01_221212 > ATY
*           -# Change to general I2C function
*           -# Change and remove several functions
*       - 1_02_231229 > ATY
*           -# add multy addr and channel
********************************************************************************
*/

/*
| **Model**      | **Structure** | **RegisterAddress** | **BytesPerPage** | **DeviceAddress**    |
|:--------------:|:-------------:|:-------------------:|:----------------:|:--------------------:|
| **AT24C01C**   | 128x8(1K)     | 7 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C01D**   | 128x8(1K)     | 7 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C02C**   | 256x8(2K)     | 8 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C02D**   | 256x8(2K)     | 8 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C04C**   | 512x8(4K)     | 9 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 P0 R/W |
| **AT24C04D**   | 512x8(4K)     | 9 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 P0 R/W |
| **AT24C08C**   | 1024x8(8K)    | 10 Bit(1 Register)  | 16 Byte          | 1 0 1 0 A2 P1 P0 R/W |
| **AT24C08D**   | 1024x8(8K)    | 10 Bit(1 Register)  | 16 Byte          | 1 0 1 0 A2 P1 P0 R/W |
| **AT24C16C**   | 2048x8(16K)   | 11 Bit(1 Register)  | 16 Byte          | 1 0 1 0 P2 P1 P0 R/W |
| **AT24C16D**   | 2048x8(16K)   | 11 Bit(1 Register)  | 16 Byte          | 1 0 1 0 P2 P1 P0 R/W |
| **AT24C32D**   | 4096x8(32K)   | 12 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C32E**   | 4096x8(32K)   | 12 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C64B**   | 8192x8(64K)   | 13 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C64D**   | 8192x8(64K)   | 13 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C128C**  | 16384x8(128K) | 14 Bit(2 Register)  | 64 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C256C**  | 32768x8(256K) | 15 Bit(2 Register)  | 64 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24C512C**  | 65536x8(512K) | 16 Bit(2 Register)  | 128 Byte         | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CM01**   | 131072x8(1M)  | 17 Bit(2 Register)  | 256 Byte         | 1 0 1 0 A2 A1 P0 R/W |
| **AT24CM02**   | 262144x8(2M)  | 18 Bit(2 Register)  | 256 Byte         | 1 0 1 0 A2 P1 P0 R/W |
| **AT24CS01**   | 128x8(1K)     | 7 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CS02**   | 256x8(2K)     | 8 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CS04**   | 512x8(4K)     | 9 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 P0 R/W |
| **AT24CS08**   | 1024x8(8K)    | 10 Bit(1 Register)  | 16 Byte          | 1 0 1 0 A2 P1 P0 R/W |
| **AT24CS16**   | 2048x8(16K)   | 11 Bit(1 Register)  | 16 Byte          | 1 0 1 0 P2 P1 P0 R/W |
| **AT24CS32**   | 4096x8(32K)   | 12 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CS64**   | 8192x8(64K)   | 13 Bit(2 Register)  | 32 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CSW010** | 128x8(1K)     | 7 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CSW020** | 256x8(2K)     | 8 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24CSW040** | 512x8(4K)     | 9 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 P0 R/W |
| **AT24CSW080** | 1024x8(8K)    | 10 Bit(1 Register)  | 16 Byte          | 1 0 1 0 A2 P1 P0 R/W |
| **AT24HC02C**  | 256x8(2K)     | 8 Bit(1 Register)   | 8 Byte           | 1 0 1 0 A2 A1 A0 R/W |
| **AT24HC04B**  | 512x8(4K)     | 9 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 P0 R/W |
| **AT24MAC402** | 256x8(2K)     | 8 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 A0 R/W |
| **AT24MAC602** | 256x8(2K)     | 8 Bit(1 Register)   | 16 Byte          | 1 0 1 0 A2 A1 A0 R/W |
*/


#ifndef __AT24CXX_ATY_H
#define __AT24CXX_ATY_H

#include "INCLUDE_ATY.h"
#include "stdlib.h"
#include "string.h"
#include "HW_TIMER_ATY.h"
#include "HW_I2C_ATY.h"

/******************************* For user *************************************/
// #define __DEBUG_AT24CXX_ATY
#define AT24CXX_TYPE            AT24C64

#define AT24CXX_A2 0
#define AT24CXX_A1 0
#define AT24CXX_A0 0

/*
The next 3 bits are the A2, A1 and A0 device address bits for the 2K EEPROM.
These 3 bits must compare to their corresponding hardwired input pins.

The 4K EEPROM only uses the A2 and A1 device address bits with the third bit
being a memory page address bit. The two device address bits must compare to
their corresponding hardwired input pins. The A0 pin is no connect.

The 8K EEPROM only uses the A2 device address bit with the next 2 bits being
for memory page addressing. The A2 bit must compare to its corresponding
hard-wired input pin. The A1 and A0 pins are no connect.

The 16K does not use any device address bits but instead the 3 bits are used
for memory page addressing.

Upon a compare of the device address, the EEPROM will output a "0".
If a compare is not made, the chip will return to a standby state.
*/

// 1 0 1 0 A2 A1 A0 R/W
#define AT24CXX_ADDRESS         (0x50 | (AT24CXX_A2 << 2) | (AT24CXX_A1 << 1) | AT24CXX_A0)
// #define AT4CXX_I2C I2C_C1


#define AT24CXX_WRITE_DELAY     16

/******************************************************************************/



#define AT24C01                 127
#define AT24C02                 255
#define AT24C04                 511
#define AT24C08                 1023
#define AT24C16                 2047
#define AT24C32                 4095
#define AT24C64                 8191
#define AT24C128                16383
#define AT24C256                32767
#define AT24C512                65535
#define AT24CM01                131072
#define AT24CM02                262144

#if (AT24CXX_TYPE == AT24C01) || (AT24CXX_TYPE == AT24C02)
#define AT24CXX_PAGE_SIZE       8
#elif (AT24CXX_TYPE == AT24C04) || (AT24CXX_TYPE == AT24C08) || (AT24CXX_TYPE == AT24C16)
#define AT24CXX_PAGE_SIZE       16
#elif (AT24CXX_TYPE == AT24C32) || (AT24CXX_TYPE == AT24C64)
#define AT24CXX_PAGE_SIZE       32
#elif (AT24CXX_TYPE == AT24C128) || (AT24CXX_TYPE == AT24C256)
#define AT24CXX_PAGE_SIZE       64
#elif (AT24CXX_TYPE == AT24C512)
#define AT24CXX_PAGE_SIZE       128
#elif (AT24CXX_TYPE == AT24CM01) || (AT24CXX_TYPE == AT24CM02)
#define AT24CXX_PAGE_SIZE       256
#endif

uint8_t AT24CXX_ReadByte(uint16_t regAddr, uint8_t addr, uint8_t channel);
void AT24CXX_WriteByte(uint16_t regAddr, uint8_t data_t, uint8_t addr, uint8_t channel);
void AT24CXX_Read(uint16_t regAddr, uint8_t* pbuf, uint16_t len, uint8_t addr, uint8_t channel);
void AT24CXX_Write(uint16_t regAddr, uint8_t* pbuf, uint16_t len, uint8_t addr, uint8_t channel);
void AT24CXX_WriteRandom(uint16_t regAddr, uint8_t* pbuf, uint16_t len, uint8_t addr, uint8_t channel);
uint8_t AT24CXX_Check(, uint8_t addr, uint8_t channel);

void AT24CXX_Init(uint8_t addr, uint8_t channel);

#ifdef __DEBUG_AT24CXX_ATY
uint8_t AT24CXX_Test(uint8_t addr, uint8_t channel);
#endif /* __DEBUG_AT24CXX_ATY */



#endif /* __AT24CXX_ATY_H */

/******************************** End Of File *********************************/