HWB_STC8_BASE.h 7.1 KB

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  1. /**
  2. * @file HWB_STC8_BASE.h
  3. *
  4. * @param Project DEVICE_GENERAL_ATY_LIB
  5. *
  6. * @author ATY
  7. *
  8. * @copyright
  9. * - Copyright 2017 - 2025 MZ-ATY
  10. * - This code follows:
  11. * - MZ-ATY Various Contents Joint Statement -
  12. * <a href="https://mengze.top/MZ-ATY_VCJS">
  13. * https://mengze.top/MZ-ATY_VCJS</a>
  14. * - CC 4.0 BY-NC-SA -
  15. * <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/">
  16. * https://creativecommons.org/licenses/by-nc-sa/4.0/</a>
  17. * - Your use will be deemed to have accepted the terms of this statement.
  18. *
  19. * @brief base defines and functions of STC8
  20. *
  21. * @version
  22. * - 1_01_230514 > ATY
  23. * -# Preliminary version, first Release
  24. ********************************************************************************
  25. */
  26. #ifndef __HWB_STC8_BASE_H
  27. #define __HWB_STC8_BASE_H
  28. #include "INCLUDE_ATY.h"
  29. /******************************* For user *************************************/
  30. SFR(CCON, 0xd8);
  31. SBIT(CR, CCON, 6);
  32. SFR(CMOD, 0xd9);
  33. SFR(CL, 0xe9);
  34. SFR(CH, 0xf9);
  35. SFR(CCAPM0, 0xda);
  36. SFR(CCAP0L, 0xea);
  37. SFR(CCAP0H, 0xfa);
  38. SFR(PCA_PWM0, 0xf2);
  39. /******************************************************************************/
  40. /* Defines ********************************************************************/
  41. #define _P0 0x80
  42. SFR(P0, _P0);
  43. SBIT(P00, _P0, 0);
  44. SBIT(P01, _P0, 1);
  45. SBIT(P02, _P0, 2);
  46. SBIT(P03, _P0, 3);
  47. SBIT(P04, _P0, 4);
  48. SBIT(P05, _P0, 5);
  49. SBIT(P06, _P0, 6);
  50. SBIT(P07, _P0, 7);
  51. SFR(SP, 0x81);
  52. SFR(DPL, 0x82);
  53. SFR(DPH, 0x83);
  54. SFR(S4CON, 0x84);
  55. SFR(S4BUF, 0x85);
  56. SFR(PCON, 0x87);
  57. #define _TCON 0x88
  58. SFR(TCON, _TCON);
  59. SBIT(TF1, _TCON, 7);
  60. SBIT(TR1, _TCON, 6);
  61. SBIT(TF0, _TCON, 5);
  62. SBIT(TR0, _TCON, 4);
  63. SBIT(IE1, _TCON, 3);
  64. SBIT(IT1, _TCON, 2);
  65. SBIT(IE0, _TCON, 1);
  66. SBIT(IT0, _TCON, 0);
  67. SFR(TMOD, 0x89);
  68. SFR(TL0, 0x8A);
  69. SFR(TL1, 0x8B);
  70. SFR(TH0, 0x8C);
  71. SFR(TH1, 0x8D);
  72. SFR(AUXR, 0x8E);
  73. SFR(INTCLKO, 0x8F);
  74. #define _P1 0x90
  75. SFR(P1, _P1);
  76. SBIT(P10, _P1, 0);
  77. SBIT(P11, _P1, 1);
  78. SBIT(P12, _P1, 2);
  79. SBIT(P13, _P1, 3);
  80. SBIT(P14, _P1, 4);
  81. SBIT(P15, _P1, 5);
  82. SBIT(P16, _P1, 6);
  83. SBIT(P17, _P1, 7);
  84. SFR(P1M1, 0x91);
  85. SFR(P1M0, 0x92);
  86. SFR(P0M1, 0x93);
  87. SFR(P0M0, 0x94);
  88. SFR(P2M1, 0x95);
  89. SFR(P2M0, 0x96);
  90. #define _SCON 0x98
  91. SFR(SCON, _SCON);
  92. SBIT(SM0, _SCON, 7);
  93. SBIT(SM1, _SCON, 6);
  94. SBIT(SM2, _SCON, 5);
  95. SBIT(REN, _SCON, 4);
  96. SBIT(TB8, _SCON, 3);
  97. SBIT(RB8, _SCON, 2);
  98. SBIT(TI, _SCON, 1);
  99. SBIT(RI, _SCON, 0);
  100. SFR(SBUF, 0x99);
  101. SFR(S2CON, 0x9A);
  102. SFR(S2BUF, 0x9B);
  103. SFR(IRCBAND, 0x9D);
  104. SFR(LIRTRIM, 0x9E);
  105. SFR(IRTRIM, 0x9F);
  106. #define _P2 0xA0
  107. SFR(P2, _P2);
  108. SBIT(P20, _P2, 0);
  109. SBIT(P21, _P2, 1);
  110. SBIT(P22, _P2, 2);
  111. SBIT(P23, _P2, 3);
  112. SBIT(P24, _P2, 4);
  113. SBIT(P25, _P2, 5);
  114. SBIT(P26, _P2, 6);
  115. SBIT(P27, _P2, 7);
  116. SFR(BUS_SPEED, 0xA1);
  117. SFR(P_SW1, 0xA2);
  118. #define _IE 0xA8
  119. SFR(IE, _IE);
  120. SBIT(EA, _IE, 7);
  121. SBIT(ELVD, _IE, 6);
  122. SBIT(EADC, _IE, 5);
  123. SBIT(ES, _IE, 4);
  124. SBIT(ET1, _IE, 3);
  125. SBIT(EX1, _IE, 2);
  126. SBIT(ET0, _IE, 1);
  127. SBIT(EX0, _IE, 0);
  128. SFR(SADDR, 0xA9);
  129. SFR(WKTCL, 0xAA);
  130. SFR(WKTCH, 0xAB);
  131. SFR(S3CON, 0xAC);
  132. SFR(S3BUF, 0xAD);
  133. SFR(TA, 0xAE);
  134. SFR(IE2, 0xAF);
  135. #define _P3 0xB0
  136. SFR(P3, _P3);
  137. SBIT(P30, _P3, 0);
  138. SBIT(P31, _P3, 1);
  139. SBIT(P32, _P3, 2);
  140. SBIT(P33, _P3, 3);
  141. SBIT(P34, _P3, 4);
  142. SBIT(P35, _P3, 5);
  143. SBIT(P36, _P3, 6);
  144. SBIT(P37, _P3, 7);
  145. SFR(P3M1, 0xB1);
  146. SFR(P3M0, 0xB2);
  147. SFR(P4M1, 0xB3);
  148. SFR(P4M0, 0xB4);
  149. SFR(IP2, 0xB5);
  150. SFR(IP2H, 0xB6);
  151. SFR(IPH, 0xB7);
  152. #define _IP 0xB8
  153. SFR(IP, _IP);
  154. SBIT(PPCA, _IP, 7);
  155. SBIT(PLVD, _IP, 6);
  156. SBIT(PADC, _IP, 5);
  157. SBIT(PS, _IP, 4);
  158. SBIT(PT1, _IP, 3);
  159. SBIT(PX1, _IP, 2);
  160. SBIT(PT0, _IP, 1);
  161. SBIT(PX0, _IP, 0);
  162. SFR(SADEN, 0xB9);
  163. SFR(P_SW2, 0xBA);
  164. SFR(ADC_CONTR, 0xBC);
  165. SFR(ADC_RES, 0xBD);
  166. SFR(ADC_RESL, 0xBE);
  167. #define _P4 0xC0
  168. SFR(P4, _P4);
  169. SBIT(P40, _P4, 0);
  170. SBIT(P41, _P4, 1);
  171. SBIT(P42, _P4, 2);
  172. SBIT(P43, _P4, 3);
  173. SBIT(P44, _P4, 4);
  174. SBIT(P45, _P4, 5);
  175. SBIT(P46, _P4, 6);
  176. SBIT(P47, _P4, 7);
  177. SFR(WDT_CONTR, 0xC1);
  178. SFR(IAP_DATA, 0xC2);
  179. SFR(IAP_ADDRH, 0xC3);
  180. SFR(IAP_ADDRL, 0xC4);
  181. SFR(IAP_CMD, 0xC5);
  182. SFR(IAP_TRIG, 0xC6);
  183. SFR(IAP_CONTR, 0xC7);
  184. #define _P5 0xC8
  185. SFR(P5, _P5);
  186. SBIT(P50, _P5, 0);
  187. SBIT(P51, _P5, 1);
  188. SBIT(P52, _P5, 2);
  189. SBIT(P53, _P5, 3);
  190. SBIT(P54, _P5, 4);
  191. SBIT(P55, _P5, 5);
  192. SBIT(P56, _P5, 6);
  193. SBIT(P57, _P5, 7);
  194. SFR(P5M1, 0xC9);
  195. SFR(P5M0, 0xCA);
  196. SFR(P6M1, 0xCB);
  197. SFR(P6M0, 0xCC);
  198. SFR(SPSTAT, 0xCD);
  199. SFR(SPCTL, 0xCE);
  200. SFR(SPDAT, 0xCF);
  201. #define _PSW 0xD0
  202. SFR(PSW, _PSW);
  203. SBIT(CY, _PSW, 7);
  204. SBIT(AC, _PSW, 6);
  205. SBIT(F0, _PSW, 5);
  206. SBIT(RS1, _PSW, 4);
  207. SBIT(RS0, _PSW, 3);
  208. SBIT(OV, _PSW, 2);
  209. SBIT(F1, _PSW, 1);
  210. SBIT(P, _PSW, 0);
  211. SFR(T4T3M, 0xD1);
  212. SFR(T4H, 0xD2);
  213. SFR(T4L, 0xD3);
  214. SFR(T3H, 0xD4);
  215. SFR(T3L, 0xD5);
  216. SFR(T2H, 0xD6);
  217. SFR(T2L, 0xD7);
  218. SFR(ACC, 0xE0);
  219. #define _P6 0xE8
  220. SFR(P6, _P6);
  221. SBIT(P60, _P6, 0);
  222. SBIT(P61, _P6, 1);
  223. SBIT(P62, _P6, 2);
  224. SBIT(P63, _P6, 3);
  225. SBIT(P64, _P6, 4);
  226. SBIT(P65, _P6, 5);
  227. SBIT(P66, _P6, 6);
  228. SBIT(P67, _P6, 7);
  229. SFR(B, 0xF0);
  230. #define _P7 0xF8
  231. SFR(P7, _P7);
  232. SBIT(P70, _P7, 0);
  233. SBIT(P71, _P7, 1);
  234. SBIT(P72, _P7, 2);
  235. SBIT(P73, _P7, 3);
  236. SBIT(P74, _P7, 4);
  237. SBIT(P75, _P7, 5);
  238. SBIT(P76, _P7, 6);
  239. SBIT(P77, _P7, 7);
  240. /* Functions ******************************************************************/
  241. #define STC8_IO_INIT \
  242. do{ \
  243. P0M0 = 0x00; \
  244. P0M1 = 0x00; \
  245. P1M0 = 0x00; \
  246. P1M1 = 0x00; \
  247. P2M0 = 0x00; \
  248. P2M1 = 0x00; \
  249. P3M0 = 0x00; \
  250. P3M1 = 0x00; \
  251. P4M0 = 0x00; \
  252. P4M1 = 0x00; \
  253. P5M0 = 0x00; \
  254. P5M1 = 0x00; \
  255. P6M0 = 0x00; \
  256. P6M1 = 0x00; \
  257. } while (0)
  258. #ifdef SYSLED_PIN
  259. #define MCU_Sleep \
  260. do{ \
  261. /* Close io or other part */ \
  262. /* LOG_ATY("\r\n\r\nSleeping...\r\n\r\n"); */ \
  263. SYSLED_PIN = 1; \
  264. /* MCU enter lose power mode */ \
  265. PCON = 0x02; \
  266. /* wont into IT function after wake up */ \
  267. _nop_(); \
  268. _nop_(); \
  269. _nop_(); \
  270. _nop_(); \
  271. /* LOG_ATY("\r\n\r\nWaking...\r\n\r\n"); */ \
  272. } while (0)
  273. #define MCU_Idle \
  274. do{ \
  275. /* Close io or other part */ \
  276. /* LOG_ATY("\r\n\r\nSleeping...\r\n\r\n"); */ \
  277. SYSLED_PIN = 1; \
  278. /* MCU enter IDLE mode */ \
  279. PCON = 0x01; \
  280. /* wont into IT function after wake up */ \
  281. _nop_(); \
  282. _nop_(); \
  283. _nop_(); \
  284. _nop_(); \
  285. /* LOG_ATY("\r\n\r\nWaking...\r\n\r\n"); */ \
  286. } while (0)
  287. #else
  288. #define MCU_Sleep \
  289. do{ \
  290. /* Close io or other part */ \
  291. /* LOG_ATY("\r\n\r\nSleeping...\r\n\r\n"); */ \
  292. /* MCU enter lose power mode */ \
  293. PCON = 0x02; \
  294. /* wont into IT function after wake up */ \
  295. _nop_(); \
  296. _nop_(); \
  297. _nop_(); \
  298. _nop_(); \
  299. /* LOG_ATY("\r\n\r\nWaking...\r\n\r\n"); */ \
  300. } while (0)
  301. #define MCU_Idle \
  302. do{ \
  303. /* Close io or other part */ \
  304. /* LOG_ATY("\r\n\r\nSleeping...\r\n\r\n"); */ \
  305. /* MCU enter IDLE mode */ \
  306. PCON = 0x01; \
  307. /* wont into IT function after wake up */ \
  308. _nop_(); \
  309. _nop_(); \
  310. _nop_(); \
  311. _nop_(); \
  312. /* LOG_ATY("\r\n\r\nWaking...\r\n\r\n"); */ \
  313. } while (0)
  314. #endif /* SYSLED_PIN */ \
  315. #define MCU_Restart \
  316. do{ \
  317. /* @STCISP# Auto ISP Flash Download */ \
  318. IAP_CONTR |= 0x60; \
  319. } while (0)
  320. /* IO Modes *******************************************************************/
  321. // #define SET_IO_MODE(p)
  322. #endif /* __HWB_STC8_BASE_H */
  323. /******************************** End Of File *********************************/