AD7124_ATY.c 25 KB

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  1. /**
  2. * @file AD7124_ATY.c
  3. *
  4. * @param Project DEVICE_GENERAL_ATY_LIB
  5. *
  6. * @author ATY
  7. *
  8. * @copyright
  9. * - Copyright 2017 - 2023 MZ-ATY
  10. * - This code follows:
  11. * - MZ-ATY Various Contents Joint Statement -
  12. * <a href="https://mengze.top/MZ-ATY_VCJS">
  13. * https://mengze.top/MZ-ATY_VCJS</a>
  14. * - CC 4.0 BY-NC-SA -
  15. * <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/">
  16. * https://creativecommons.org/licenses/by-nc-sa/4.0/</a>
  17. * - Your use will be deemed to have accepted the terms of this statement.
  18. *
  19. * @brief Familiar functions of AD7124 for all embedded device
  20. *
  21. * @version
  22. * - 1_01_230828 > ATY
  23. * -# Preliminary version, first Release
  24. * - 1_02_231229 > ATY
  25. * -# add multy addr and dev->channel
  26. * - 1_01_240111 > ATY
  27. * -# add lock
  28. ********************************************************************************
  29. */
  30. #ifndef __AD7124_ATY_C
  31. #define __AD7124_ATY_C
  32. #include "AD7124_ATY.h"
  33. /******************************* For user *************************************/
  34. /******************************************************************************/
  35. /**
  36. * @brief
  37. *
  38. * @param data
  39. * @param len
  40. * @param dev
  41. * @return uint8_t
  42. */
  43. uint8_t AD7124_WriteRead(uint8_t* data, uint8_t len, struct AD7124_ATY_Dev* dev)
  44. {
  45. uint8_t errCode = 0;
  46. __ATY_LOCK(dev);
  47. dev->nssSet(_ATY_HL_L);
  48. if(dev->debugEnable == 1){
  49. for(int i = 0; i < len; i++) dev->LOG("%02X", data[i]);
  50. dev->LOG(" ");
  51. }
  52. errCode = dev->spiProcess(data, len, _ATY_RW_RW);
  53. if(dev->debugEnable == 1){
  54. for(int i = 0; i < len; i++) dev->LOG("%02X", data[i]);
  55. dev->LOG(" ");
  56. }
  57. dev->nssSet(_ATY_HL_H);
  58. __ATY_UNLOCK(dev);
  59. return errCode;
  60. }
  61. /**
  62. * @brief
  63. *
  64. * @param dev
  65. * @return uint8_t
  66. */
  67. uint8_t AD7124_Reset(struct AD7124_ATY_Dev* dev)
  68. {
  69. uint8_t errCode = 0, resetBuf[9] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  70. __ATY_LOCK(dev);
  71. dev->syncSet(_ATY_HL_H);
  72. // dev->delay(10);
  73. dev->nssSet(_ATY_HL_H);
  74. dev->delay(10);
  75. __ATY_UNLOCK(dev);
  76. // write more than 64 bits to reset AD7124
  77. errCode = AD7124_WriteRead(resetBuf, 9, dev);
  78. return errCode;
  79. }
  80. /**
  81. * @brief
  82. *
  83. * @param id
  84. * @param dev
  85. * @return uint8_t
  86. */
  87. uint8_t AD7124_ReadId(uint8_t* id, struct AD7124_ATY_Dev* dev)
  88. {
  89. uint8_t errCode = 0, groupTrans[2] = {0};
  90. groupTrans[0] = 0x45;
  91. groupTrans[1] = 0;
  92. errCode = AD7124_WriteRead(groupTrans, 2, dev);
  93. dev->id = groupTrans[1];
  94. *id = dev->id;
  95. if(dev->debugEnable == 1)
  96. dev->LOG("AD7124_ID: %02X\r\n", dev->id);
  97. return errCode;
  98. }
  99. /**
  100. * @brief
  101. *
  102. * @param regAddr
  103. * @param data
  104. * @param len
  105. * @param dev
  106. * @return uint8_t
  107. * @note AD7124_ERR_REG_SPI_IGNORE_ERR only for crc trans
  108. */
  109. uint8_t AD7124_WriteReg(uint8_t regAddr, uint32_t data, uint8_t len, struct AD7124_ATY_Dev* dev)
  110. {
  111. uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
  112. groupTrans[0] = AD7124_COMM_REG_WA(regAddr);
  113. for(i = 0; i < len; i++){
  114. groupTrans[len - i] = data & 0xFF;
  115. data = data >> 8;
  116. }
  117. if(dev->debugEnable == 1){
  118. for(i = 0; i < len + 1; i++)
  119. dev->LOG("%02X", groupTrans[i]);
  120. dev->LOG(" ");
  121. }
  122. errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
  123. return errCode;
  124. }
  125. /**
  126. * @brief
  127. *
  128. * @param regAddr
  129. * @param data
  130. * @param len
  131. * @param dev
  132. * @return uint8_t
  133. */
  134. uint8_t AD7124_ReadReg(uint8_t regAddr, uint32_t* data, uint8_t len, struct AD7124_ATY_Dev* dev)
  135. {
  136. uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
  137. groupTrans[0] = AD7124_COMM_REG_RA(regAddr);
  138. errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
  139. if(len == 1)
  140. *data = groupTrans[1];
  141. else if(len == 2)
  142. *data = (groupTrans[1] + (groupTrans[2] << 8));
  143. else if(len == 3)
  144. *data = (groupTrans[1] + (groupTrans[2] << 8) + (groupTrans[3] << 16));
  145. if(dev->debugEnable == 1){
  146. for(i = 0; i < len + 1; i++)
  147. dev->LOG("%X", data);
  148. dev->LOG(" ");
  149. }
  150. return errCode;
  151. }
  152. /**
  153. * @brief
  154. *
  155. * @param data
  156. * @param dev
  157. * @return uint8_t
  158. */
  159. uint8_t AD7124_ReadData(uint8_t* data, struct AD7124_ATY_Dev* dev)
  160. {
  161. uint8_t errCode = 0, i = 0;
  162. data[0] = AD7124_COMM_REG_RA(AD7124_DATA_REG);
  163. errCode = AD7124_WriteRead(data, 5, dev);
  164. if(dev->debugEnable == 1){
  165. dev->LOG("Data: 0x");
  166. for(i = 0; i < 5; i++)
  167. dev->LOG("%02X", data[i]);
  168. dev->LOG(" ");
  169. }
  170. return errCode;
  171. }
  172. /**
  173. * @brief
  174. *
  175. * @param status
  176. * @param dev
  177. * @return uint8_t
  178. */
  179. uint8_t AD7124_ReadStatus(uint8_t* status, struct AD7124_ATY_Dev* dev)
  180. {
  181. if(AD7124_ReadReg(AD7124_STATUS_REG, (uint32_t*)status, 1, dev)){
  182. if(dev->debugEnable == 1)
  183. dev->LOG("AD7124_ERR: STATE %02X%02X\r\n",
  184. status[0], status[1]);
  185. return 1;
  186. }
  187. dev->delay(10);
  188. return 0;
  189. }
  190. /**
  191. * @brief
  192. *
  193. * @param data
  194. * @param resolution
  195. * @param refRes
  196. * @param gain
  197. * @return float
  198. */
  199. float AD7124_DataToRes(uint32_t data, uint8_t resolution, float refRes, uint8_t gain)
  200. {
  201. uint32_t tempNum = 1;
  202. uint8_t i = 0;
  203. for(i = 0; i < resolution - 1; i++)
  204. tempNum *= 2;
  205. return (float)((((float)data - (float)tempNum) * refRes) / ((float)gain * (float)tempNum));
  206. }
  207. /**
  208. * @brief
  209. *
  210. * @param data
  211. * @return float
  212. */
  213. float AD7124_DataToResDefault(uint32_t data)
  214. {
  215. return (float)((((float)data - 8388608.0f) * 5110.0f) / (16.0f * 8388608.0f));
  216. }
  217. /**
  218. * @brief
  219. *
  220. * @param cfg
  221. * @param dev
  222. * @return uint8_t
  223. */
  224. uint8_t AD7124_Init(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
  225. {
  226. uint8_t id = 0, status[2] = {0};
  227. dev->enSet(_ATY_HL_H);
  228. if(AD7124_Reset(dev)){
  229. if(dev->debugEnable == 1)
  230. dev->LOG("AD7124_ERR: RST\r\n");
  231. return 1;
  232. }
  233. if(AD7124_ReadId(&id, dev)){
  234. if(dev->debugEnable == 1)
  235. dev->LOG("AD7124_ERR: ID\r\n");
  236. return 2;
  237. }
  238. if(AD7124_ReadStatus(status, dev)){
  239. if(dev->debugEnable == 1)
  240. dev->LOG("AD7124_ERR: Status\r\n");
  241. return 3;
  242. }
  243. if(AD7124_Config(cfg, dev)){
  244. if(dev->debugEnable == 1)
  245. dev->LOG("AD7124_ERR: CFG\r\n");
  246. return 4;
  247. }
  248. return 0;
  249. }
  250. /**
  251. * @brief
  252. *
  253. * @param cfg
  254. * @param dev
  255. * @return uint8_t
  256. */
  257. uint8_t AD7124_Config(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
  258. {
  259. if(cfg->AD7124_ADC_CTRL_REG_t) AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev);
  260. if(cfg->AD7124_IO_CTRL1_REG_t) AD7124_WriteReg(AD7124_IO_CTRL1_REG, cfg->AD7124_IO_CTRL1_REG_t, 3, dev);
  261. if(cfg->AD7124_IO_CTRL2_REG_t) AD7124_WriteReg(AD7124_IO_CTRL2_REG, cfg->AD7124_IO_CTRL2_REG_t, 2, dev);
  262. if(cfg->AD7124_ERREN_REG_t) AD7124_WriteReg(AD7124_ERREN_REG, cfg->AD7124_ERREN_REG_t, 3, dev);
  263. if(cfg->AD7124_CH0_MAP_REG_t) AD7124_WriteReg(AD7124_CH0_MAP_REG, cfg->AD7124_CH0_MAP_REG_t, 2, dev);
  264. if(cfg->AD7124_CH1_MAP_REG_t) AD7124_WriteReg(AD7124_CH1_MAP_REG, cfg->AD7124_CH1_MAP_REG_t, 2, dev);
  265. if(cfg->AD7124_CH2_MAP_REG_t) AD7124_WriteReg(AD7124_CH2_MAP_REG, cfg->AD7124_CH2_MAP_REG_t, 2, dev);
  266. if(cfg->AD7124_CH3_MAP_REG_t) AD7124_WriteReg(AD7124_CH3_MAP_REG, cfg->AD7124_CH3_MAP_REG_t, 2, dev);
  267. if(cfg->AD7124_CH4_MAP_REG_t) AD7124_WriteReg(AD7124_CH4_MAP_REG, cfg->AD7124_CH4_MAP_REG_t, 2, dev);
  268. if(cfg->AD7124_CH5_MAP_REG_t) AD7124_WriteReg(AD7124_CH5_MAP_REG, cfg->AD7124_CH5_MAP_REG_t, 2, dev);
  269. if(cfg->AD7124_CH6_MAP_REG_t) AD7124_WriteReg(AD7124_CH6_MAP_REG, cfg->AD7124_CH6_MAP_REG_t, 2, dev);
  270. if(cfg->AD7124_CH7_MAP_REG_t) AD7124_WriteReg(AD7124_CH7_MAP_REG, cfg->AD7124_CH7_MAP_REG_t, 2, dev);
  271. if(cfg->AD7124_CH8_MAP_REG_t) AD7124_WriteReg(AD7124_CH8_MAP_REG, cfg->AD7124_CH8_MAP_REG_t, 2, dev);
  272. if(cfg->AD7124_CH9_MAP_REG_t) AD7124_WriteReg(AD7124_CH9_MAP_REG, cfg->AD7124_CH9_MAP_REG_t, 2, dev);
  273. if(cfg->AD7124_CH10_MAP_REG_t) AD7124_WriteReg(AD7124_CH10_MAP_REG, cfg->AD7124_CH10_MAP_REG_t, 2, dev);
  274. if(cfg->AD7124_CH11_MAP_REG_t) AD7124_WriteReg(AD7124_CH11_MAP_REG, cfg->AD7124_CH11_MAP_REG_t, 2, dev);
  275. if(cfg->AD7124_CH12_MAP_REG_t) AD7124_WriteReg(AD7124_CH12_MAP_REG, cfg->AD7124_CH12_MAP_REG_t, 2, dev);
  276. if(cfg->AD7124_CH13_MAP_REG_t) AD7124_WriteReg(AD7124_CH13_MAP_REG, cfg->AD7124_CH13_MAP_REG_t, 2, dev);
  277. if(cfg->AD7124_CH14_MAP_REG_t) AD7124_WriteReg(AD7124_CH14_MAP_REG, cfg->AD7124_CH14_MAP_REG_t, 2, dev);
  278. if(cfg->AD7124_CH15_MAP_REG_t) AD7124_WriteReg(AD7124_CH15_MAP_REG, cfg->AD7124_CH15_MAP_REG_t, 2, dev);
  279. if(cfg->AD7124_CFG0_REG_t) AD7124_WriteReg(AD7124_CFG0_REG, cfg->AD7124_CFG0_REG_t, 2, dev);
  280. if(cfg->AD7124_CFG1_REG_t) AD7124_WriteReg(AD7124_CFG1_REG, cfg->AD7124_CFG1_REG_t, 2, dev);
  281. if(cfg->AD7124_CFG2_REG_t) AD7124_WriteReg(AD7124_CFG2_REG, cfg->AD7124_CFG2_REG_t, 2, dev);
  282. if(cfg->AD7124_CFG3_REG_t) AD7124_WriteReg(AD7124_CFG3_REG, cfg->AD7124_CFG3_REG_t, 2, dev);
  283. if(cfg->AD7124_CFG4_REG_t) AD7124_WriteReg(AD7124_CFG4_REG, cfg->AD7124_CFG4_REG_t, 2, dev);
  284. if(cfg->AD7124_CFG5_REG_t) AD7124_WriteReg(AD7124_CFG5_REG, cfg->AD7124_CFG5_REG_t, 2, dev);
  285. if(cfg->AD7124_CFG6_REG_t) AD7124_WriteReg(AD7124_CFG6_REG, cfg->AD7124_CFG6_REG_t, 2, dev);
  286. if(cfg->AD7124_CFG7_REG_t) AD7124_WriteReg(AD7124_CFG7_REG, cfg->AD7124_CFG7_REG_t, 2, dev);
  287. if(cfg->AD7124_FILT0_REG_t) AD7124_WriteReg(AD7124_FILT0_REG, cfg->AD7124_FILT0_REG_t, 3, dev);
  288. if(cfg->AD7124_FILT1_REG_t) AD7124_WriteReg(AD7124_FILT1_REG, cfg->AD7124_FILT1_REG_t, 3, dev);
  289. if(cfg->AD7124_FILT2_REG_t) AD7124_WriteReg(AD7124_FILT2_REG, cfg->AD7124_FILT2_REG_t, 3, dev);
  290. if(cfg->AD7124_FILT3_REG_t) AD7124_WriteReg(AD7124_FILT3_REG, cfg->AD7124_FILT3_REG_t, 3, dev);
  291. if(cfg->AD7124_FILT4_REG_t) AD7124_WriteReg(AD7124_FILT4_REG, cfg->AD7124_FILT4_REG_t, 3, dev);
  292. if(cfg->AD7124_FILT5_REG_t) AD7124_WriteReg(AD7124_FILT5_REG, cfg->AD7124_FILT5_REG_t, 3, dev);
  293. if(cfg->AD7124_FILT6_REG_t) AD7124_WriteReg(AD7124_FILT6_REG, cfg->AD7124_FILT6_REG_t, 3, dev);
  294. if(cfg->AD7124_FILT7_REG_t) AD7124_WriteReg(AD7124_FILT7_REG, cfg->AD7124_FILT7_REG_t, 3, dev);
  295. if(cfg->AD7124_OFFS0_REG_t) AD7124_WriteReg(AD7124_OFFS0_REG, cfg->AD7124_OFFS0_REG_t, 3, dev);
  296. if(cfg->AD7124_OFFS1_REG_t) AD7124_WriteReg(AD7124_OFFS1_REG, cfg->AD7124_OFFS1_REG_t, 3, dev);
  297. if(cfg->AD7124_OFFS2_REG_t) AD7124_WriteReg(AD7124_OFFS2_REG, cfg->AD7124_OFFS2_REG_t, 3, dev);
  298. if(cfg->AD7124_OFFS3_REG_t) AD7124_WriteReg(AD7124_OFFS3_REG, cfg->AD7124_OFFS3_REG_t, 3, dev);
  299. if(cfg->AD7124_OFFS4_REG_t) AD7124_WriteReg(AD7124_OFFS4_REG, cfg->AD7124_OFFS4_REG_t, 3, dev);
  300. if(cfg->AD7124_OFFS5_REG_t) AD7124_WriteReg(AD7124_OFFS5_REG, cfg->AD7124_OFFS5_REG_t, 3, dev);
  301. if(cfg->AD7124_OFFS6_REG_t) AD7124_WriteReg(AD7124_OFFS6_REG, cfg->AD7124_OFFS6_REG_t, 3, dev);
  302. if(cfg->AD7124_OFFS7_REG_t) AD7124_WriteReg(AD7124_OFFS7_REG, cfg->AD7124_OFFS7_REG_t, 3, dev);
  303. if(cfg->AD7124_GAIN0_REG_t) AD7124_WriteReg(AD7124_GAIN0_REG, cfg->AD7124_GAIN0_REG_t, 3, dev);
  304. if(cfg->AD7124_GAIN1_REG_t) AD7124_WriteReg(AD7124_GAIN1_REG, cfg->AD7124_GAIN1_REG_t, 3, dev);
  305. if(cfg->AD7124_GAIN2_REG_t) AD7124_WriteReg(AD7124_GAIN2_REG, cfg->AD7124_GAIN2_REG_t, 3, dev);
  306. if(cfg->AD7124_GAIN3_REG_t) AD7124_WriteReg(AD7124_GAIN3_REG, cfg->AD7124_GAIN3_REG_t, 3, dev);
  307. if(cfg->AD7124_GAIN4_REG_t) AD7124_WriteReg(AD7124_GAIN4_REG, cfg->AD7124_GAIN4_REG_t, 3, dev);
  308. if(cfg->AD7124_GAIN5_REG_t) AD7124_WriteReg(AD7124_GAIN5_REG, cfg->AD7124_GAIN5_REG_t, 3, dev);
  309. if(cfg->AD7124_GAIN6_REG_t) AD7124_WriteReg(AD7124_GAIN6_REG, cfg->AD7124_GAIN6_REG_t, 3, dev);
  310. if(cfg->AD7124_GAIN7_REG_t) AD7124_WriteReg(AD7124_GAIN7_REG, cfg->AD7124_GAIN7_REG_t, 3, dev);
  311. if(dev->debugEnable == 1)
  312. dev->LOG("\r\n");
  313. return 0;
  314. }
  315. /**
  316. * @brief
  317. *
  318. * @param calibrateType b1111
  319. * @param cfg
  320. * @param dev
  321. * @return uint8_t
  322. * @note 0001 int full cal at mid power
  323. 0010 int zero cal at full power
  324. 0100 sys full cal
  325. 1000 sys zero cal
  326. */
  327. uint8_t AD7124_Calibrate(uint8_t calibrateType, struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
  328. {
  329. uint32_t regTrans = 0;
  330. AD7124_WriteReg(AD7124_OFFS0_REG, 0x800000, 3, dev);
  331. AD7124_WriteReg(AD7124_OFFS1_REG, 0x800000, 3, dev);
  332. AD7124_WriteReg(AD7124_OFFS2_REG, 0x800000, 3, dev);
  333. AD7124_WriteReg(AD7124_OFFS3_REG, 0x800000, 3, dev);
  334. AD7124_WriteReg(AD7124_OFFS4_REG, 0x800000, 3, dev);
  335. AD7124_WriteReg(AD7124_OFFS5_REG, 0x800000, 3, dev);
  336. AD7124_WriteReg(AD7124_OFFS6_REG, 0x800000, 3, dev);
  337. AD7124_WriteReg(AD7124_OFFS7_REG, 0x800000, 3, dev);
  338. if(calibrateType & AD7124_CALIBRATE_INT_FULL){
  339. AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0058, 2, dev); // int full cal at mid power
  340. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  341. dev->delay(1500); // 1300ms min
  342. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  343. }
  344. if(calibrateType & AD7124_CALIBRATE_INT_ZERO){
  345. AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0094, 2, dev); // int zero cal at full power
  346. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  347. dev->delay(100); // 80ms min
  348. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  349. }
  350. if(calibrateType & AD7124_CALIBRATE_SYS_FULL){
  351. AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x00A0, 2, dev); // sys full cal
  352. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  353. dev->delay(100); // 80ms min
  354. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  355. }
  356. if(calibrateType & AD7124_CALIBRATE_SYS_ZERO){
  357. AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x009C, 2, dev); // sys zero cal
  358. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  359. dev->delay(100); // 80ms min
  360. AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
  361. }
  362. AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev); // detect mode
  363. if(dev->debugEnable == 1)
  364. dev->LOG("\r\n");
  365. dev->delay(1);
  366. return 0;
  367. }
  368. /**
  369. * @brief
  370. *
  371. * @param dev
  372. * @return uint8_t
  373. */
  374. uint8_t AD7124_ReadAllReg(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev)
  375. {
  376. uint8_t i = 0;
  377. uint32_t* p = (uint32_t*)cfg;
  378. if(dev->debugEnable == 1)
  379. dev->LOG("Regs %d\r\n", (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)));
  380. for(i = 0; i < (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)); i++){ // 0x00~0x38
  381. if(dev->debugEnable == 1)
  382. dev->LOG("Reg 0x%02X: ", i);
  383. AD7124_ReadReg(i, (p + i), 3, dev);
  384. if(dev->debugEnable == 1)
  385. dev->LOG("\r\n");
  386. }
  387. // AD7124_ReadReg(AD7124_ADC_CTRL_REG, groupTrans, 2, dev);
  388. if(dev->debugEnable == 1)
  389. dev->LOG("\r\n");
  390. return 0;
  391. }
  392. #endif /* __AD7124_ATY_C */
  393. /************************************ etc *************************************/
  394. /* init */
  395. // void AD7124_1_NSS_SET(uint8_t level){
  396. // if(level == _ATY_HL_L)
  397. // GPIO_SET_L(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
  398. // else if(level == _ATY_HL_H)
  399. // GPIO_SET_H(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
  400. // }
  401. // void AD7124_1_EN_SET(uint8_t level){ }
  402. // void AD7124_1_SYNC_SET(uint8_t level){ }
  403. // uint8_t AD7124_1_SPI(uint8_t* data_t, uint16_t len, uint8_t rw){
  404. // if(rw == _ATY_RW_RW)
  405. // return HAL_SPI_TransmitReceive(&hspi2, (uint8_t*)data_t, (uint8_t*)data_t, len, 1000);
  406. // return 0;
  407. // }
  408. // struct AD7124_ATY_Dev AD7124_ATY_Dev_1 = {
  409. // .id = 0,
  410. // .nssSet = AD7124_1_NSS_SET,
  411. // .enSet = AD7124_1_EN_SET,
  412. // .syncSet = AD7124_1_SYNC_SET,
  413. // .spiProcess = AD7124_1_SPI,
  414. // .delay = HAL_Delay,
  415. // .lock = _ATY_UNLOCKED,
  416. // .debugEnable = 0,
  417. // .LOG = printf
  418. // };
  419. // struct AD7124_ATY_Cfg AD7124_ATY_Cfg_RTD4_1 = {
  420. // .AD7124_ADC_CTRL_REG_t = 0x0480,
  421. // .AD7124_IO_CTRL1_REG_t = 0x000400,
  422. // // .AD7124_ERREN_REG_t = 0x06FFFF,
  423. // .AD7124_CFG0_REG_t = 0x09E4,
  424. // .AD7124_FILT0_REG_t = 0x0060180,
  425. // .AD7124_GAIN0_REG_t = 0x5558CC,
  426. // .AD7124_CH0_MAP_REG_t = 0x9211, //IC Temp
  427. // .AD7124_CFG1_REG_t = 0x09E4,
  428. // .AD7124_FILT1_REG_t = 0x0060180,
  429. // .AD7124_GAIN1_REG_t = 0x05558CC,
  430. // .AD7124_CH1_MAP_REG_t = 0x9022,
  431. // };
  432. // struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC1_1 = {
  433. // .AD7124_ADC_CTRL_REG_t = 0x0480,
  434. // .AD7124_IO_CTRL1_REG_t = 0x002040,
  435. // .AD7124_CFG1_REG_t = 0x09E1,
  436. // .AD7124_FILT1_REG_t = 0x0060180,
  437. // .AD7124_GAIN1_REG_t = 0x05558CC,
  438. // .AD7124_CH2_MAP_REG_t = 0x90A6, // 500uA * 5.11K = 2.5Vref, 1K gain 2 max
  439. // };
  440. // struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC10_1 = {
  441. // .AD7124_ADC_CTRL_REG_t = 0x0580,
  442. // .AD7124_CFG1_REG_t = 0x09F0,
  443. // .AD7124_FILT1_REG_t = 0x0060180,
  444. // .AD7124_GAIN1_REG_t = 0x5558CC,
  445. // .AD7124_CH3_MAP_REG_t = 0x918D,
  446. // .AD7124_CH4_MAP_REG_t = 0x91CF,
  447. // };
  448. // struct AD7124_ATY_Cfg AD7124_ATY_Cfg_TC_1 = {
  449. // .AD7124_ADC_CTRL_REG_t = 0x0580,
  450. // .AD7124_IO_CTRL2_REG_t = 0x0500,
  451. // .AD7124_CFG1_REG_t = 0x09F7,
  452. // .AD7124_FILT1_REG_t = 0x0060180,
  453. // .AD7124_GAIN1_REG_t = 0x5558CC,
  454. // .AD7124_CH5_MAP_REG_t = 0x9109,
  455. // .AD7124_CH6_MAP_REG_t = 0x914B,
  456. // };
  457. /* use */
  458. // uint8_t group_AD7124_Data[5] = {0};
  459. // if(adInitFlag == 0){
  460. // adInitFlag = 1;
  461. // AD7124_Init(&AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
  462. // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
  463. // &AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
  464. // }
  465. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  466. // AD7124_Calc(group_AD7124_Data);
  467. // // IC Temp
  468. // fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0f) - 272.5f;
  469. // // RTD4
  470. // calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 16);
  471. // fastTempCalc = ALGO_Temp_RTD_Res_Fast(calcRes);
  472. // aboveTempCalc = ALGO_Temp_RTD_Res_Above(calcRes);
  473. // belowTempCalc = ALGO_Temp_RTD_Res_Below(calcRes);
  474. // // NTC1K
  475. // calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 2);
  476. // fastTempCalc = ALGO_ResToKelvinTemp((calcRes / 1000.0f), 1.0f, 3950);
  477. // // NTC10K
  478. // calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (1.0f * 8388608.0f));
  479. // calcRes = ((calcVol * 10.0f) / (2500.0f - calcVol));
  480. // fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3380);
  481. // // TC
  482. // calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (128.0f * 8388608.0f));
  483. // float coldTemp = 25.0f;
  484. // float calcVolCold = ALGO_Temp_TC_TempToVol('T', coldTemp);
  485. // calcVol += calcVolCold;
  486. // aboveTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
  487. // belowTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
  488. // fastTempCalc = aboveTempCalc;
  489. // ALGO_Kalman1D_S kfp1D_BT[2] = {{0, 0, 1, 1, 1, 1e-7, 1e-6}, {0, 0, 1, 1, 1, 1e-7, 1e-6}};
  490. // rcPara_t rcfp_BT[2] = {{0.02262, 0}, {0.036, 0}};
  491. // uint8_t group_AD7124_Data[5] = {0};
  492. // uint8_t adDetectType = 6; // 0: IC temp, 1: RTD, 2: NTC1K, 34: NTC10K, 56: TC
  493. // uint8_t adInitFlag = 0;
  494. // void AD7124_Calc(uint8_t* codeGroup)
  495. // {
  496. // if((codeGroup[4] & 0x80) != 0)
  497. // return;
  498. // if((codeGroup[4] & 0x0F) != adDetectType)
  499. // return;
  500. // uint32_t ad7124Code = (codeGroup[3] + (codeGroup[2] << 8) + (codeGroup[1] << 16));
  501. // static uint32_t lastAd7124Code = 0;
  502. // if(lastAd7124Code == ad7124Code)
  503. // return;
  504. // lastAd7124Code = ad7124Code;
  505. // float calcVol = 0, calcRes = 0, fastTempCalc = 0, aboveTempCalc = 0, belowTempCalc = 0;
  506. // if((codeGroup[4] & 0x0F) == 0){ // IC Temp
  507. // fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0f) - 272.5f;
  508. // }
  509. // if((codeGroup[4] & 0x0F) == 1){ // RTD4
  510. // calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 16);
  511. // fastTempCalc = ALGO_Temp_RTD_Res_Fast(calcRes);
  512. // aboveTempCalc = ALGO_Temp_RTD_Res_Above(calcRes);
  513. // belowTempCalc = ALGO_Temp_RTD_Res_Below(calcRes);
  514. // }
  515. // if((codeGroup[4] & 0x0F) == 2){ // NTC1K
  516. // calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0f, 2);
  517. // fastTempCalc = ALGO_ResToKelvinTemp((calcRes / 1000.0f), 1.0f, 3950);
  518. // }
  519. // if(((codeGroup[4] & 0x0F) == 3) || ((codeGroup[4] & 0x0F) == 4)){ // NTC10K
  520. // calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (1.0f * 8388608.0f));
  521. // calcRes = ((calcVol * 10.0f) / (2500.0f - calcVol));
  522. // if((codeGroup[4] & 0x0F) == 3)
  523. // fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3380);
  524. // else if((codeGroup[4] & 0x0F) == 4)
  525. // fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0f, 3950);
  526. // }
  527. // if(((codeGroup[4] & 0x0F) == 5) || ((codeGroup[4] & 0x0F) == 6)){ // TC
  528. // calcVol = (((float)ad7124Code - 8388608.0f) * 2500.0f / (128.0f * 8388608.0f));
  529. // float coldTemp = 25.0f;
  530. // float calcVolCold = ALGO_Temp_TC_TempToVol('T', coldTemp);
  531. // calcVol += calcVolCold;
  532. // aboveTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
  533. // belowTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
  534. // fastTempCalc = belowTempCalc;
  535. // }
  536. // float rcTemp[2] = {0};
  537. // rcTemp[0] = rcLpFiter(&rcfp_BT[0], belowTempCalc);
  538. // rcTemp[1] = rcLpFiter(&rcfp_BT[1], rcTemp[0]);
  539. // if(ALGO_ABS(belowTempCalc - rcTemp[0]) > 0.1) {
  540. // rcfp_BT[0].lVal = belowTempCalc;
  541. // rcfp_BT[1].lVal = belowTempCalc;
  542. // }
  543. // float kalmanBelowTemp[2] = {0};
  544. // kalmanBelowTemp[0] = ALGO_KalmanFilter1D(&kfp1D_BT[0], rcTemp[1]);
  545. // kalmanBelowTemp[1] = ALGO_KalmanFilter1D(&kfp1D_BT[1], kalmanBelowTemp[0]);
  546. // if(ALGO_ABS(kalmanBelowTemp[0] - belowTempCalc) > 0.1){
  547. // kfp1D_BT[0].X = belowTempCalc;
  548. // kfp1D_BT[1].X = belowTempCalc;
  549. // kalmanBelowTemp[0] = belowTempCalc;
  550. // kalmanBelowTemp[1] = belowTempCalc;
  551. // }
  552. // #define AD7124_DBG
  553. // #ifdef AD7124_DBG
  554. // printf("C %02d: ", (codeGroup[4] & 0x0F));
  555. // printf("%02X%02X%02X%02X%02X ",
  556. // codeGroup[0], codeGroup[1],
  557. // codeGroup[2], codeGroup[3],
  558. // codeGroup[4]);
  559. // printf("%.09f ", calcVol);
  560. // printf("%.09f ", calcRes);
  561. // printf("%.09f ", fastTempCalc);
  562. // printf("%.09f ", aboveTempCalc);
  563. // printf("%.09f ", belowTempCalc);
  564. // // printf("%.09f ", rcTemp[0]);
  565. // // printf("%.09f ", rcTemp[1]);
  566. // // printf("%.09f ", kalmanBelowTemp[0]);
  567. // // printf("%.09f ", kalmanBelowTemp[1]);
  568. // printf("\r\n");
  569. // #endif
  570. // }
  571. // void AD7124_Detect(void)
  572. // {
  573. // static uint8_t lastChannel = 0;
  574. // if(lastChannel != adDetectType){
  575. // lastChannel = adDetectType;
  576. // adInitFlag = 0;
  577. // }
  578. // switch(adDetectType)
  579. // {
  580. // case 0:
  581. // case 1:
  582. // if(adInitFlag == 0){
  583. // adInitFlag = 1;
  584. // AD7124_Init(&AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
  585. // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
  586. // &AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
  587. // }
  588. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  589. // AD7124_Calc(group_AD7124_Data);
  590. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  591. // AD7124_Calc(group_AD7124_Data);
  592. // break;
  593. // case 2:
  594. // if(adInitFlag == 0){
  595. // adInitFlag = 1;
  596. // AD7124_Init(&AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
  597. // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
  598. // &AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
  599. // }
  600. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  601. // AD7124_Calc(group_AD7124_Data);
  602. // break;
  603. // case 3:
  604. // case 4:
  605. // if(adInitFlag == 0){
  606. // adInitFlag = 1;
  607. // AD7124_Init(&AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
  608. // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
  609. // &AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
  610. // }
  611. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  612. // AD7124_Calc(group_AD7124_Data);
  613. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  614. // AD7124_Calc(group_AD7124_Data);
  615. // break;
  616. // case 5:
  617. // case 6:
  618. // if(adInitFlag == 0){
  619. // adInitFlag = 1;
  620. // AD7124_Init(&AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
  621. // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
  622. // &AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
  623. // }
  624. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  625. // AD7124_Calc(group_AD7124_Data);
  626. // AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
  627. // AD7124_Calc(group_AD7124_Data);
  628. // break;
  629. // default:
  630. // break;
  631. // }
  632. // }
  633. /******************************************************************************/
  634. /******************************** End Of File *********************************/