ATY_LIB/AD7124_ATY.c

/**
* @file AD7124_ATY.c
*
* @param Project DEVICE_GENERAL_ATY_LIB
*
* @author ATY
*
* @copyright
*       - Copyright 2017 - 2026 MZ-ATY
*       - This code follows:
*           - MZ-ATY Various Contents Joint Statement -
*               <a href="https://mengze.top/MZ-ATY_VCJS">
*                        https://mengze.top/MZ-ATY_VCJS</a>
*           - CC 4.0 BY-NC-SA -
*               <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/">
*                        https://creativecommons.org/licenses/by-nc-sa/4.0/</a>
*       - Your use will be deemed to have accepted the terms of this statement.
*
* @brief functions of AD7124 for C platform
*
* @version
*       - 1_01_230828 > ATY
*           -# Preliminary version, first Release
*       - 1_02_231229 > ATY
*           -# add multy addr and dev->channel
*       - 1_03_240111 > ATY
*           -# add lock
*       - 1_04_251124 > ATY
*           -# change log and test basely
********************************************************************************
*/

#ifndef __AD7124_ATY_C
#define __AD7124_ATY_C

#include "AD7124_ATY.h"
#define AD7124_ATY_TAG "\r\n[AD7124_ATY] "

/******************************* For user *************************************/

/******************************************************************************/

/**
 * @brief
 *
 * @param   data
 * @param   len
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_WriteRead(uint8_t* data, uint8_t len, struct AD7124_ATY_Dev* dev){
    uint8_t errCode = 0;
    __ATY_LOCK(dev);
    dev->nssSet(__ATY_HL_L);
    printf_ATY_D("%sRW_W: ", AD7124_ATY_TAG);
    for(int i = 0; i < len; i++) printf_ATY_D("%02X ", data[i]);
    errCode = dev->spiProcess(data, len, __ATY_RW_RW);
    printf_ATY_D("%sRW_R: ", AD7124_ATY_TAG);
    for(int i = 0; i < len; i++) printf_ATY_D("%02X ", data[i]);
    dev->nssSet(__ATY_HL_H);
    __ATY_UNLOCK(dev);
    return errCode;
}


/**
 * @brief
 *
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_Reset(struct AD7124_ATY_Dev* dev){
    uint8_t errCode = 0, resetBuf[9] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
    printf_ATY_D("%s--Reset", AD7124_ATY_TAG);
    __ATY_LOCK(dev);
    dev->syncSet(__ATY_HL_H);
    // dev->delay(10);
    dev->nssSet(__ATY_HL_H);
    dev->delay(10);
    __ATY_UNLOCK(dev);

    // write more than 64 bits to reset AD7124
    errCode = AD7124_WriteRead(resetBuf, 9, dev);
    return errCode;
}

/**
 * @brief
 *
 * @param   id
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_ReadId(uint8_t* id, struct AD7124_ATY_Dev* dev){
    uint8_t errCode = 0, groupTrans[2] = {0};
    printf_ATY_D("%s--ReadId", AD7124_ATY_TAG);
    groupTrans[0] = 0x45;
    groupTrans[1] = 0;
    errCode = AD7124_WriteRead(groupTrans, 2, dev);
    dev->id = groupTrans[1];
    *id = dev->id;
    printf_ATY_D("%sAD7124_ID: %02X\r\n", AD7124_ATY_TAG, dev->id);
    return errCode;
}

/**
 * @brief
 *
 * @param   regAddr
 * @param   data
 * @param   len
 * @param   dev
 * @return  uint8_t
 * @note    AD7124_ERR_REG_SPI_IGNORE_ERR only for crc trans
 */
uint8_t AD7124_WriteReg(uint8_t regAddr, uint32_t data, uint8_t len, struct AD7124_ATY_Dev* dev){
    uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
    printf_ATY_D("%s--WriteReg", AD7124_ATY_TAG);
    groupTrans[0] = AD7124_COMM_REG_WA(regAddr);
    for(i = 0; i < len; i++){
        groupTrans[len - i] = data & 0xFF;
        data = data >> 8;
    }
    printf_ATY_D("%sWriteReg: ", AD7124_ATY_TAG);
    for(i = 0; i < len + 1; i++)
        printf_ATY_D("%02X ", groupTrans[i]);
    errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
    return errCode;
}

/**
 * @brief
 *
 * @param   regAddr
 * @param   data
 * @param   len
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_ReadReg(uint8_t regAddr, uint32_t* data, uint8_t len, struct AD7124_ATY_Dev* dev){
    uint8_t errCode = 0, i = 0, groupTrans[4] = {0};
    printf_ATY_D("%s--ReadReg", AD7124_ATY_TAG);
    groupTrans[0] = AD7124_COMM_REG_RA(regAddr);
    errCode = AD7124_WriteRead(groupTrans, len + 1, dev);
    if(len == 1)
        *data = groupTrans[1];
    else if(len == 2)
        *data = (groupTrans[1] + (groupTrans[2] << 8));
    else if(len == 3)
        *data = (groupTrans[1] + (groupTrans[2] << 8) + (groupTrans[3] << 16));
    printf_ATY_D("%sReadReg: ", AD7124_ATY_TAG);
    for(i = 0; i < len + 1; i++)
        printf_ATY_D("%X ", data);
    return errCode;
}

/**
 * @brief
 *
 * @param   data
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_ReadData(uint8_t* data, struct AD7124_ATY_Dev* dev){
    printf_ATY_D("%s--ReadData", AD7124_ATY_TAG);
    uint8_t errCode = 0, i = 0;
    data[0] = AD7124_COMM_REG_RA(AD7124_DATA_REG);
    errCode = AD7124_WriteRead(data, 5, dev);
    printf_ATY_D("%sReadData: 0x ", AD7124_ATY_TAG);
    for(i = 0; i < 5; i++)
        printf_ATY_D("%02X ", data[i]);
    return errCode;
}

/**
 * @brief
 *
 * @param   status
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_ReadStatus(uint8_t* status, struct AD7124_ATY_Dev* dev){
    printf_ATY_D("%s--ReadStatus", AD7124_ATY_TAG);
    if(AD7124_ReadReg(AD7124_STATUS_REG, (uint32_t*)status, 1, dev)){
        printf_ATY_D("%sAD7124_ERR: STATE %02X %02X\r\n",
            AD7124_ATY_TAG, status[0], status[1]);
        return 1;
    }
    dev->delay(10);
    return 0;
}

/**
 * @brief
 *
 * @param   data
 * @param   resolution
 * @param   refRes
 * @param   gain
 * @return  float
 */
float AD7124_DataToRes(uint32_t data, uint8_t resolution, float refRes, uint8_t gain){
    uint32_t tempNum = 1;
    uint8_t i = 0;
    for(i = 0; i < resolution - 1; i++)
        tempNum *= 2;
    return (float)((((float)data - (float)tempNum) * refRes) / ((float)gain * (float)tempNum));
}

/**
 * @brief
 *
 * @param   data
 * @return  float
 */
float AD7124_DataToResDefault(uint32_t data){
    return (float)((((float)data - 8388608.0) * 5110.0) / (16.0 * 8388608.0));
}

/**
 * @brief
 *
 * @param   cfg
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_Init(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev){
    uint8_t id = 0, status[2] = {0};
    dev->enSet(__ATY_HL_H);
    if(AD7124_Reset(dev)){
        printf_ATY_D("%sAD7124_ERR: RST\r\n", AD7124_ATY_TAG);
        return 1;
    }
    if(AD7124_ReadId(&id, dev)){
        printf_ATY_D("%sAD7124_ERR: ID\r\n", AD7124_ATY_TAG);
        return 2;
    }
    if(AD7124_ReadStatus(status, dev)){
        printf_ATY_D("%sAD7124_ERR: Status\r\n", AD7124_ATY_TAG);
        return 3;
    }
    if(AD7124_Config(cfg, dev)){
        printf_ATY_D("%sAD7124_ERR: CFG\r\n", AD7124_ATY_TAG);
        return 4;
    }
    return 0;
}

/**
 * @brief
 *
 * @param   cfg
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_Config(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev){
    printf_ATY_D("%s--Config", AD7124_ATY_TAG);
    if(cfg->AD7124_ADC_CTRL_REG_t) AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev);
    if(cfg->AD7124_IO_CTRL1_REG_t) AD7124_WriteReg(AD7124_IO_CTRL1_REG, cfg->AD7124_IO_CTRL1_REG_t, 3, dev);
    if(cfg->AD7124_IO_CTRL2_REG_t) AD7124_WriteReg(AD7124_IO_CTRL2_REG, cfg->AD7124_IO_CTRL2_REG_t, 2, dev);
    if(cfg->AD7124_ERREN_REG_t) AD7124_WriteReg(AD7124_ERREN_REG, cfg->AD7124_ERREN_REG_t, 3, dev);

    if(cfg->AD7124_CH0_MAP_REG_t) AD7124_WriteReg(AD7124_CH0_MAP_REG, cfg->AD7124_CH0_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH1_MAP_REG_t) AD7124_WriteReg(AD7124_CH1_MAP_REG, cfg->AD7124_CH1_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH2_MAP_REG_t) AD7124_WriteReg(AD7124_CH2_MAP_REG, cfg->AD7124_CH2_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH3_MAP_REG_t) AD7124_WriteReg(AD7124_CH3_MAP_REG, cfg->AD7124_CH3_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH4_MAP_REG_t) AD7124_WriteReg(AD7124_CH4_MAP_REG, cfg->AD7124_CH4_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH5_MAP_REG_t) AD7124_WriteReg(AD7124_CH5_MAP_REG, cfg->AD7124_CH5_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH6_MAP_REG_t) AD7124_WriteReg(AD7124_CH6_MAP_REG, cfg->AD7124_CH6_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH7_MAP_REG_t) AD7124_WriteReg(AD7124_CH7_MAP_REG, cfg->AD7124_CH7_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH8_MAP_REG_t) AD7124_WriteReg(AD7124_CH8_MAP_REG, cfg->AD7124_CH8_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH9_MAP_REG_t) AD7124_WriteReg(AD7124_CH9_MAP_REG, cfg->AD7124_CH9_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH10_MAP_REG_t) AD7124_WriteReg(AD7124_CH10_MAP_REG, cfg->AD7124_CH10_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH11_MAP_REG_t) AD7124_WriteReg(AD7124_CH11_MAP_REG, cfg->AD7124_CH11_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH12_MAP_REG_t) AD7124_WriteReg(AD7124_CH12_MAP_REG, cfg->AD7124_CH12_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH13_MAP_REG_t) AD7124_WriteReg(AD7124_CH13_MAP_REG, cfg->AD7124_CH13_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH14_MAP_REG_t) AD7124_WriteReg(AD7124_CH14_MAP_REG, cfg->AD7124_CH14_MAP_REG_t, 2, dev);
    if(cfg->AD7124_CH15_MAP_REG_t) AD7124_WriteReg(AD7124_CH15_MAP_REG, cfg->AD7124_CH15_MAP_REG_t, 2, dev);

    if(cfg->AD7124_CFG0_REG_t) AD7124_WriteReg(AD7124_CFG0_REG, cfg->AD7124_CFG0_REG_t, 2, dev);
    if(cfg->AD7124_CFG1_REG_t) AD7124_WriteReg(AD7124_CFG1_REG, cfg->AD7124_CFG1_REG_t, 2, dev);
    if(cfg->AD7124_CFG2_REG_t) AD7124_WriteReg(AD7124_CFG2_REG, cfg->AD7124_CFG2_REG_t, 2, dev);
    if(cfg->AD7124_CFG3_REG_t) AD7124_WriteReg(AD7124_CFG3_REG, cfg->AD7124_CFG3_REG_t, 2, dev);
    if(cfg->AD7124_CFG4_REG_t) AD7124_WriteReg(AD7124_CFG4_REG, cfg->AD7124_CFG4_REG_t, 2, dev);
    if(cfg->AD7124_CFG5_REG_t) AD7124_WriteReg(AD7124_CFG5_REG, cfg->AD7124_CFG5_REG_t, 2, dev);
    if(cfg->AD7124_CFG6_REG_t) AD7124_WriteReg(AD7124_CFG6_REG, cfg->AD7124_CFG6_REG_t, 2, dev);
    if(cfg->AD7124_CFG7_REG_t) AD7124_WriteReg(AD7124_CFG7_REG, cfg->AD7124_CFG7_REG_t, 2, dev);

    if(cfg->AD7124_FILT0_REG_t) AD7124_WriteReg(AD7124_FILT0_REG, cfg->AD7124_FILT0_REG_t, 3, dev);
    if(cfg->AD7124_FILT1_REG_t) AD7124_WriteReg(AD7124_FILT1_REG, cfg->AD7124_FILT1_REG_t, 3, dev);
    if(cfg->AD7124_FILT2_REG_t) AD7124_WriteReg(AD7124_FILT2_REG, cfg->AD7124_FILT2_REG_t, 3, dev);
    if(cfg->AD7124_FILT3_REG_t) AD7124_WriteReg(AD7124_FILT3_REG, cfg->AD7124_FILT3_REG_t, 3, dev);
    if(cfg->AD7124_FILT4_REG_t) AD7124_WriteReg(AD7124_FILT4_REG, cfg->AD7124_FILT4_REG_t, 3, dev);
    if(cfg->AD7124_FILT5_REG_t) AD7124_WriteReg(AD7124_FILT5_REG, cfg->AD7124_FILT5_REG_t, 3, dev);
    if(cfg->AD7124_FILT6_REG_t) AD7124_WriteReg(AD7124_FILT6_REG, cfg->AD7124_FILT6_REG_t, 3, dev);
    if(cfg->AD7124_FILT7_REG_t) AD7124_WriteReg(AD7124_FILT7_REG, cfg->AD7124_FILT7_REG_t, 3, dev);

    if(cfg->AD7124_OFFS0_REG_t) AD7124_WriteReg(AD7124_OFFS0_REG, cfg->AD7124_OFFS0_REG_t, 3, dev);
    if(cfg->AD7124_OFFS1_REG_t) AD7124_WriteReg(AD7124_OFFS1_REG, cfg->AD7124_OFFS1_REG_t, 3, dev);
    if(cfg->AD7124_OFFS2_REG_t) AD7124_WriteReg(AD7124_OFFS2_REG, cfg->AD7124_OFFS2_REG_t, 3, dev);
    if(cfg->AD7124_OFFS3_REG_t) AD7124_WriteReg(AD7124_OFFS3_REG, cfg->AD7124_OFFS3_REG_t, 3, dev);
    if(cfg->AD7124_OFFS4_REG_t) AD7124_WriteReg(AD7124_OFFS4_REG, cfg->AD7124_OFFS4_REG_t, 3, dev);
    if(cfg->AD7124_OFFS5_REG_t) AD7124_WriteReg(AD7124_OFFS5_REG, cfg->AD7124_OFFS5_REG_t, 3, dev);
    if(cfg->AD7124_OFFS6_REG_t) AD7124_WriteReg(AD7124_OFFS6_REG, cfg->AD7124_OFFS6_REG_t, 3, dev);
    if(cfg->AD7124_OFFS7_REG_t) AD7124_WriteReg(AD7124_OFFS7_REG, cfg->AD7124_OFFS7_REG_t, 3, dev);

    if(cfg->AD7124_GAIN0_REG_t) AD7124_WriteReg(AD7124_GAIN0_REG, cfg->AD7124_GAIN0_REG_t, 3, dev);
    if(cfg->AD7124_GAIN1_REG_t) AD7124_WriteReg(AD7124_GAIN1_REG, cfg->AD7124_GAIN1_REG_t, 3, dev);
    if(cfg->AD7124_GAIN2_REG_t) AD7124_WriteReg(AD7124_GAIN2_REG, cfg->AD7124_GAIN2_REG_t, 3, dev);
    if(cfg->AD7124_GAIN3_REG_t) AD7124_WriteReg(AD7124_GAIN3_REG, cfg->AD7124_GAIN3_REG_t, 3, dev);
    if(cfg->AD7124_GAIN4_REG_t) AD7124_WriteReg(AD7124_GAIN4_REG, cfg->AD7124_GAIN4_REG_t, 3, dev);
    if(cfg->AD7124_GAIN5_REG_t) AD7124_WriteReg(AD7124_GAIN5_REG, cfg->AD7124_GAIN5_REG_t, 3, dev);
    if(cfg->AD7124_GAIN6_REG_t) AD7124_WriteReg(AD7124_GAIN6_REG, cfg->AD7124_GAIN6_REG_t, 3, dev);
    if(cfg->AD7124_GAIN7_REG_t) AD7124_WriteReg(AD7124_GAIN7_REG, cfg->AD7124_GAIN7_REG_t, 3, dev);

    printf_ATY_D("\r\n");
    return 0;
}

/**
 * @brief
 *
 * @param   calibrateType b1111
 * @param   cfg
 * @param   dev
 * @return  uint8_t
 * @note    0001 int full cal at mid power
            0010 int zero cal at full power
            0100 sys full cal
            1000 sys zero cal
 */
uint8_t AD7124_Calibrate(uint8_t calibrateType, struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev){
    uint32_t regTrans = 0;
    printf_ATY_D("%s--Calibrate: %02X", AD7124_ATY_TAG, calibrateType);
    AD7124_WriteReg(AD7124_OFFS0_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS1_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS2_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS3_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS4_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS5_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS6_REG, 0x800000, 3, dev);
    AD7124_WriteReg(AD7124_OFFS7_REG, 0x800000, 3, dev);

    if(calibrateType & AD7124_CALIBRATE_INT_FULL){
        AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0058, 2, dev);                   // int full cal at mid power
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
        dev->delay(1500);    // 1300ms min
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
    }
    if(calibrateType & AD7124_CALIBRATE_INT_ZERO){
        AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x0094, 2, dev);                   // int zero cal at full power
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
        dev->delay(100);     // 80ms min
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
    }
    if(calibrateType & AD7124_CALIBRATE_SYS_FULL){
        AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x00A0, 2, dev);                   // sys full cal
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
        dev->delay(100);     // 80ms min
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
    }
    if(calibrateType & AD7124_CALIBRATE_SYS_ZERO){
        AD7124_WriteReg(AD7124_ADC_CTRL_REG, 0x009C, 2, dev);                   // sys zero cal
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
        dev->delay(100);     // 80ms min
        AD7124_ReadReg(AD7124_ADC_CTRL_REG, &regTrans, 2, dev);
    }

    AD7124_WriteReg(AD7124_ADC_CTRL_REG, cfg->AD7124_ADC_CTRL_REG_t, 2, dev);   // detect mode
    printf_ATY_D("\r\n");
    dev->delay(1);
    return 0;
}

/**
 * @brief
 *
 * @param   dev
 * @return  uint8_t
 */
uint8_t AD7124_ReadAllReg(struct AD7124_ATY_Cfg* cfg, struct AD7124_ATY_Dev* dev){
    uint8_t i = 0;
    uint32_t* p = (uint32_t*)cfg;
    printf_ATY_D("%s--AllRegs %d", AD7124_ATY_TAG, (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)));
    for(i = 0; i < (sizeof(struct AD7124_ATY_Cfg) / sizeof(uint32_t)); i++){    // 0x00~0x38
        printf_ATY_D("\r\nReg 0x%02X: ", i);
        AD7124_ReadReg(i, (p + i), 3, dev);
    }
    // AD7124_ReadReg(AD7124_ADC_CTRL_REG, groupTrans, 2, dev);
    printf_ATY_D("\r\n");
    return 0;
}

#endif /* __AD7124_ATY_C */

/************************************ etc *************************************/
/* init */
// #include "AD7124_ATY.h"
// void AD7124_1_NSS_SET(uint8_t level){
//     if(level == __ATY_HL_L)
//         GPIO_SET_L(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
//     else if(level == __ATY_HL_H)
//         GPIO_SET_H(SPI2_NSS_GPIO_Port, SPI2_NSS_Pin);
// }
// void AD7124_1_EN_SET(uint8_t level){ }
// void AD7124_1_SYNC_SET(uint8_t level){ }
// uint8_t AD7124_1_SPI(uint8_t* data_t, uint16_t len, uint8_t rw){
//     if(rw == _ATY_RW_RW)
//         return HAL_SPI_TransmitReceive(&hspi2, (uint8_t*)data_t, (uint8_t*)data_t, len, 1000);
//     return 0;
// }
// struct AD7124_ATY_Dev AD7124_ATY_Dev_1 = {
//     .id = 0,
//     .nssSet = AD7124_1_NSS_SET,
//     .enSet = AD7124_1_EN_SET,
//     .syncSet = AD7124_1_SYNC_SET,
//     .spiProcess = AD7124_1_SPI,
//     .delay = HAL_Delay,
//     .lock = __ATY_UNLOCKED,
//     .debugEnable = 0,
// };


/* config template */
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_CHIP_T = {
//     .AD7124_ADC_CTRL_REG_t = 0x0580,
//
//     .AD7124_CFG0_REG_t = 0x09F0,
//
//     .AD7124_CH0_MAP_REG_t = 0x8211, // IC Temp, int vref
// };
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC10_O1 = {
//     .AD7124_ADC_CTRL_REG_t = 0x0580,
//
//     .AD7124_CFG1_REG_t = 0x09F0,
//     .AD7124_FILT1_REG_t = 0x0060180,
//     .AD7124_GAIN1_REG_t = 0x5558CC,
//
//     .AD7124_CH0_MAP_REG_t = 0x918D,
// };
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_RTD4_1 = {
//     .AD7124_ADC_CTRL_REG_t = 0x0480,
//     .AD7124_IO_CTRL1_REG_t = 0x000400,
//     // .AD7124_ERREN_REG_t = 0x06FFFF,
//
//     .AD7124_CFG0_REG_t = 0x09E4,
//     .AD7124_FILT0_REG_t = 0x0060180,
//     .AD7124_GAIN0_REG_t = 0x5558CC,
//     .AD7124_CH0_MAP_REG_t = 0x9211, //IC Temp
//
//     .AD7124_CFG1_REG_t = 0x09E4,
//     .AD7124_FILT1_REG_t = 0x0060180,
//     .AD7124_GAIN1_REG_t = 0x05558CC,
//     .AD7124_CH1_MAP_REG_t = 0x9022,
// };
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC1_1 = {
//     .AD7124_ADC_CTRL_REG_t = 0x0480,
//     .AD7124_IO_CTRL1_REG_t = 0x002040,
//
//     .AD7124_CFG1_REG_t = 0x09E1,
//     .AD7124_FILT1_REG_t = 0x0060180,
//     .AD7124_GAIN1_REG_t = 0x05558CC,
//      // 500uA * 5.11K = 2.5Vref, 1K gain 2 max
//     .AD7124_CH2_MAP_REG_t = 0x90A6,
// };
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_NTC10_1 = {
//     .AD7124_ADC_CTRL_REG_t = 0x0580,
//
//     .AD7124_CFG1_REG_t = 0x09F0,
//     .AD7124_FILT1_REG_t = 0x0060180,
//     .AD7124_GAIN1_REG_t = 0x5558CC,
//
//     .AD7124_CH3_MAP_REG_t = 0x918D,
//     .AD7124_CH4_MAP_REG_t = 0x91CF,
// };
// struct AD7124_ATY_Cfg AD7124_ATY_Cfg_TC_1 = {
//     .AD7124_ADC_CTRL_REG_t = 0x0580,
//     .AD7124_IO_CTRL2_REG_t = 0x0500,
//
//     .AD7124_CFG1_REG_t = 0x09F7,
//     .AD7124_FILT1_REG_t = 0x0060180,
//     .AD7124_GAIN1_REG_t = 0x5558CC,
//
//     .AD7124_CH5_MAP_REG_t = 0x9109,
//     .AD7124_CH6_MAP_REG_t = 0x914B,
// };


/* use */
// tested 20ms fastest at stm32f103cbt6, spi 18MBit/s, line 50mm

// uint8_t group_AD7124_Data[5] = {0};

// uint8_t adDetectType = 0;   // 0: IC temp / user channel, 1: RTD, 2: NTC1K, 34: NTC10K, 56: TC
// uint8_t adInitFlag = 0;

// uint32_t ad7124Code = 0;
// uint8_t ad7124End = 0;
// uint8_t ad7124State = 0;

// #define AD_INIT_MAX_COUNT 8
// void AD7124_Calc(uint8_t* codeGroup){
//     if((codeGroup[4] & 0x80) != 0){
//         adInitFlag++;
//         if(adInitFlag > AD_INIT_MAX_COUNT){
//             adInitFlag = 0;
//         }
//         return;
//     }
//
//     if((codeGroup[4] & 0x0F) != adDetectType){
//         adInitFlag++;
//         if(adInitFlag > AD_INIT_MAX_COUNT)
//             adInitFlag = 0;
//         return;
//     }
//
//     ad7124State = codeGroup[4];
//     ad7124End = codeGroup[0];
//     ad7124Code = (codeGroup[3] + (codeGroup[2] << 8) + (codeGroup[1] << 16));
//
//     float calcVol = 0, calcRes = 0, fastTempCalc = 0, aboveTempCalc = 0, belowTempCalc = 0;
//     if((codeGroup[4] & 0x0F) == 0){                                             // IC Temp
//         fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0) - 272.5;
//     }
//     if((codeGroup[4] & 0x0F) == 1){                                             // RTD4
//         calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0, 16);
//     }
//     if((codeGroup[4] & 0x0F) == 2){                                             // NTC1K
//         calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0, 2);
//     }
//     if(((codeGroup[4] & 0x0F) == 3) || ((codeGroup[4] & 0x0F) == 4)){           // NTC10K
//         calcRes = 10.0 * 1000.0 * ((double)((double)(ad7124Code - 0x800000) / (double)(0x1000000 - ad7124Code)));
//     }
//     if(((codeGroup[4] & 0x0F) == 5) || ((codeGroup[4] & 0x0F) == 6)){           // TC
//         calcVol = (((float)ad7124Code - 8388608.0) * 2500.0 / (128.0 * 8388608.0));
//     }
// }

// void AD7124_Detect(void){
//     static uint8_t lastChannel = 0;
//     if(lastChannel != adDetectType){
//         lastChannel = adDetectType;
//         adInitFlag = 0;
//     }
//     switch(adDetectType){
//         case 0:
//         case 1:
//             if(adInitFlag == 0){
//                 adInitFlag = 1;
//                 // AD7124_Init(&AD7124_ATY_Cfg_CHIP_T, &AD7124_ATY_Dev_1);
//                 AD7124_Init(&AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
//                 // AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
//                 //     &AD7124_ATY_Cfg_RTD4_1, &AD7124_ATY_Dev_1);
//             }
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             break;
//         case 2:
//             if(adInitFlag == 0){
//                 adInitFlag = 1;
//                 AD7124_Init(&AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
//                 AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
//                     &AD7124_ATY_Cfg_NTC1_1, &AD7124_ATY_Dev_1);
//             }
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             break;
//         case 3:
//         case 4:
//             if(adInitFlag == 0){
//                 adInitFlag = 1;
//                 AD7124_Init(&AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
//                 AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
//                     &AD7124_ATY_Cfg_NTC10_1, &AD7124_ATY_Dev_1);
//             }
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             break;
//         case 5:
//         case 6:
//             if(adInitFlag == 0){
//                 adInitFlag = 1;
//                 AD7124_Init(&AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
//                 AD7124_Calibrate(AD7124_CALIBRATE_INT_FULL | AD7124_CALIBRATE_INT_ZERO,
//                     &AD7124_ATY_Cfg_TC_1, &AD7124_ATY_Dev_1);
//             }
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             AD7124_ReadData(group_AD7124_Data, &AD7124_ATY_Dev_1);
//             AD7124_Calc(group_AD7124_Data);
//             break;
//         default:
//             break;
//     }
// }

/* calc */
// // IC Temp
// fastTempCalc = ((float)(ad7124Code - 0x800000) / 13584.0) - 272.5;

// // RTD4
// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0, 16);
// fastTempCalc = ALGO_Temp_RTD_Res_Fast(calcRes);
// aboveTempCalc = ALGO_Temp_RTD_Res_Above(calcRes);
// belowTempCalc = ALGO_Temp_RTD_Res_Below(calcRes);

// // NTC1K
// calcRes = AD7124_DataToRes(ad7124Code, 24, 5110.0, 2);
// fastTempCalc = ALGO_ResToKelvinTemp((calcRes / 1000.0), 1.0, 3950);
// // NTC10K
// calcVol = (((float)ad7124Code - 8388608.0) * 2500.0 / (1.0 * 8388608.0));
// calcRes = ((calcVol * 10.0) / (2500.0 - calcVol));
// fastTempCalc = ALGO_ResToKelvinTemp(calcRes, 10.0, 3380);

// // TC
// calcVol = (((float)ad7124Code - 8388608.0) * 2500.0 / (128.0 * 8388608.0));
// float coldTemp = 25.0;
// float calcVolCold = ALGO_Temp_TC_TempToVol('T', coldTemp);
// calcVol += calcVolCold;
// aboveTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
// belowTempCalc = ALGO_Temp_TC_VolToTemp('T', calcVol);
// fastTempCalc = aboveTempCalc;


/******************************************************************************/

/******************************** End Of File *********************************/