#include "fw_conf.h"
#include "fw_types.h"
Go to the source code of this file.
|
| #define | CMP_SetEnabled(__STATE__) SFR_ASSIGN(CMPCR1, 7, __STATE__) |
| |
| #define | CMP_ClearInterrupt() SFR_ASSIGN(CMPCR1, 6, 0) |
| |
| #define | CMP_OLD_SetPositiveInput(__INPUT__) SFR_ASSIGN(CMPCR1, 3, __INPUT__) |
| |
| #define | CMP_SetPositiveInput(__INPUT__) |
| |
| #define | CMP_OLD_SetNegativeInput(__INPUT__) SFR_ASSIGN(CMPCR1, 2, __INPUT__) |
| |
| #define | CMP_SetNegativeInput(__INPUT__) SFRX_ASSIGN(CMPEXCFG, 2, __INPUT__) |
| |
| #define | CMP_SetResultOutputState(__STATE__) SFR_ASSIGN(CMPCR1, 1, __STATE__) |
| |
| #define | CMP_ReadResultOutput() (CMPCR1 & 0x01) |
| |
| #define | CMP_SetResultOutputInvert(__STATE__) SFR_ASSIGN(CMPCR2, 7, __STATE__) |
| |
| #define | CMP_SetFilterDisabled(__STATE__) SFR_ASSIGN(CMPCR2, 6, __STATE__) |
| |
| #define | CMP_SetDebouncingClocks(__CLOCKS__) CMPCR2 = CMPCR2 & ~(0x3F) | (__CLOCKS__ & 0x3F) |
| |
| #define | CMP_SetHysteresis(__HYST__) |
| |
◆ CMP_ClearInterrupt
| #define CMP_ClearInterrupt |
( |
| ) |
SFR_ASSIGN(CMPCR1, 6, 0) |
◆ CMP_OLD_SetNegativeInput
| #define CMP_OLD_SetNegativeInput |
( |
|
__INPUT__ | ) |
SFR_ASSIGN(CMPCR1, 2, __INPUT__) |
for 2P+2N series. Set negative input pin, 0:1.19V ref, 1:P36
Definition at line 100 of file fw_cmp.h.
◆ CMP_OLD_SetPositiveInput
| #define CMP_OLD_SetPositiveInput |
( |
|
__INPUT__ | ) |
SFR_ASSIGN(CMPCR1, 3, __INPUT__) |
for 2P+2N series. Set positive input pin, 0:P36, 1:ADC
Definition at line 86 of file fw_cmp.h.
◆ CMP_ReadResultOutput
| #define CMP_ReadResultOutput |
( |
| ) |
(CMPCR1 & 0x01) |
◆ CMP_SetDebouncingClocks
| #define CMP_SetDebouncingClocks |
( |
|
__CLOCKS__ | ) |
CMPCR2 = CMPCR2 & ~(0x3F) | (__CLOCKS__ & 0x3F) |
Comparator result will be delayed for (CLOCKS + 2) clocks
Definition at line 126 of file fw_cmp.h.
◆ CMP_SetEnabled
| #define CMP_SetEnabled |
( |
|
__STATE__ | ) |
SFR_ASSIGN(CMPCR1, 7, __STATE__) |
◆ CMP_SetFilterDisabled
| #define CMP_SetFilterDisabled |
( |
|
__STATE__ | ) |
SFR_ASSIGN(CMPCR2, 6, __STATE__) |
0: Enable 0.1us analog filter 1: Disable 0.1us analog filter
Definition at line 122 of file fw_cmp.h.
◆ CMP_SetHysteresis
| #define CMP_SetHysteresis |
( |
|
__HYST__ | ) |
|
Value: do{ \
SFRX_ON(); \
SFRX_OFF(); \
} while(0)
Set comparator hysteresis for producing stable switching behavior.
Definition at line 130 of file fw_cmp.h.
◆ CMP_SetNegativeInput
for 4P+2N series. Set negative input pin, 0:P36, 1:1.19Vref
Definition at line 105 of file fw_cmp.h.
◆ CMP_SetPositiveInput
| #define CMP_SetPositiveInput |
( |
|
__INPUT__ | ) |
|
Value: do{ \
SFRX_ON(); \
SFRX_OFF(); \
} while(0)
for 4P+2N series. Set positive input pin, 0:P36, 1:P50, 2:P51, 3:ADC
Definition at line 91 of file fw_cmp.h.
◆ CMP_SetResultOutputInvert
| #define CMP_SetResultOutputInvert |
( |
|
__STATE__ | ) |
SFR_ASSIGN(CMPCR2, 7, __STATE__) |
0: P34/P41 output high when result is 1 1: P34/P41 output low when result is 1
Definition at line 117 of file fw_cmp.h.
◆ CMP_SetResultOutputState
| #define CMP_SetResultOutputState |
( |
|
__STATE__ | ) |
SFR_ASSIGN(CMPCR1, 1, __STATE__) |
Result output 0:no output, 1:output to P34 or P41
Definition at line 111 of file fw_cmp.h.
◆ CMP_Hysteresis_t
| Enumerator |
|---|
| CMP_Hysteresis_0mV | |
| CMP_Hysteresis_10mV | |
| CMP_Hysteresis_20mV | |
| CMP_Hysteresis_30mV | |
Definition at line 72 of file fw_cmp.h.
◆ CMP_NegativeInput_t
| Enumerator |
|---|
| CMP_NegativeInput_P36 | |
| CMP_NegativeInput_RefV | |
Definition at line 66 of file fw_cmp.h.
◆ CMP_OLD_NegativeInput_t
| Enumerator |
|---|
| CMP_OLD_NegativeInput_RefV | |
| CMP_OLD_NegativeInput_P36 | |
Definition at line 52 of file fw_cmp.h.
53{
@ CMP_OLD_NegativeInput_RefV
@ CMP_OLD_NegativeInput_P36
◆ CMP_OLD_PositiveInput_t
STC8 MCU analog comparator
2P: 2 positive input options 4P: 4 positive input options
| | 2P+2N | 4P+2N | | STC8G1K08 | Y | | | STC8G1K08-8Pin | N | | | STC8G1K08A | N | | | STC8G2K64S4 | Y | | | STC8G2K64S2 | Y | | | STC8G1K08T | Y | | | STC15H2K64S4 | Y | | | STC8H1K08 | Y | | | STC8H1K28 | Y | | | STC8H3K64S4 | Y | | | STC8H3K64S2 | Y | | | STC8H2K64T | Y | |
| STC8H8K64U | | Y |
| STC8H4K64TLR | | Y |
| STC8H4K64TLCD | | Y |
| STC8H4K64LCD | | Y |
| Enumerator |
|---|
| CMP_OLD_PositiveInput_P37 | |
| CMP_OLD_PositiveInput_ADC | |
Definition at line 46 of file fw_cmp.h.
47{
@ CMP_OLD_PositiveInput_ADC
@ CMP_OLD_PositiveInput_P37
◆ CMP_PositiveInput_t
| Enumerator |
|---|
| CMP_PositiveInput_P37 | |
| CMP_PositiveInput_P50 | |
| CMP_PositiveInput_P51 | |
| CMP_PositiveInput_ADC | |
Definition at line 58 of file fw_cmp.h.