#include "fw_conf.h"
#include "fw_types.h"

Macros
#define	DMA_M2M_SetSrcAddrIncrement(__STATE__) SFRX_ASSIGN(DMA_M2M_CFG, 5, __STATE__)

#define	DMA_M2M_SetDstAddrIncrement(__STATE__) SFRX_ASSIGN(DMA_M2M_CFG, 4, __STATE__)

#define	DMA_M2M_SetBusPriority(__PRI__) SFRX_ASSIGN2BIT(DMA_M2M_CFG, 0, __PRI__)

#define	DMA_M2M_SetEnabled(__STATE__) SFRX_ASSIGN(DMA_M2M_CR, 7, __STATE__)

#define	DMA_M2M_Start() SFRX_SET(DMA_M2M_CR, 6)

#define	DMA_M2M_ClearInterrupt() SFRX_RESET(DMA_M2M_STA, 0)

#define	DMA_M2M_SetTxLength(__LEN__) do{SFRX_ON(); DMA_M2M_AMT = (__LEN__); SFRX_OFF();}while(0)

#define	DMA_M2M_SetSrcAddr(__16BIT_ADDR__)

#define	DMA_M2M_SetDstAddr(__16BIT_ADDR__)

#define	DMA_ADC_SetBusPriority(__PRI__) SFRX_ASSIGN2BIT(DMA_ADC_CFG, 0, __PRI__)

#define	DMA_ADC_SetEnabled(__STATE__) SFRX_ASSIGN(DMA_ADC_CR, 7, __STATE__)

#define	DMA_ADC_Start() SFRX_SET(DMA_ADC_CR, 6)

#define	DMA_ADC_ClearInterrupt() SFRX_RESET(DMA_ADC_STA, 0)

#define	DMA_ADC_SetDstAddr(__16BIT_ADDR__)

#define	DMA_ADC_SetConvTimes(__TIMES__)

#define	DMA_ADC_EnableChannels(__16BIT_CHANNEL__)

Enumerations
enum	DMA_BusPriority_t { DMA_BusPriority_Lowest = 0x00 , DMA_BusPriority_Low = 0x01 , DMA_BusPriority_High = 0x02 , DMA_BusPriority_Highest = 0x03 }

enum	DMA_ADC_ConvTimes_t { DMA_ADC_ConvTimes_1 = 0x00 , DMA_ADC_ConvTimes_2 = 0x08 , DMA_ADC_ConvTimes_4 = 0x09 , DMA_ADC_ConvTimes_8 = 0x0a , DMA_ADC_ConvTimes_16 = 0x0b , DMA_ADC_ConvTimes_32 = 0x0c , DMA_ADC_ConvTimes_64 = 0x0d , DMA_ADC_ConvTimes_128 = 0x0e , DMA_ADC_ConvTimes_256 = 0x0f }

Macro Definition Documentation

◆ DMA_ADC_ClearInterrupt

#define DMA_ADC_ClearInterrupt ( ) SFRX_RESET(DMA_ADC_STA, 0)

Definition at line 76 of file fw_dma.h.

◆ DMA_ADC_EnableChannels

#define DMA_ADC_EnableChannels ( __16BIT_CHANNEL__ )

Value:

                                                        do{   \
                                                        SFRX_ON(); \
                                                        DMA_ADC_CHSW0 = (__CHANNEL__ >> 8) & 0xFF; \
                                                        DMA_ADC_CHSW1 = __CHANNEL__ & 0xFF; \
                                                        SFRX_OFF(); \
                                                    } while(0)

auto-scann channels. scanning always starts from lower number channels.

Parameters

__16BIT_CHANNEL__ from high to low each bit stands for one ADC channel, start from ADC15 to ADC0, e.g. 0x11 means ADC8 and ADC0

Definition at line 94 of file fw_dma.h.

◆ DMA_ADC_SetBusPriority

#define DMA_ADC_SetBusPriority ( __PRI__ ) SFRX_ASSIGN2BIT(DMA_ADC_CFG, 0, __PRI__)

Definition at line 73 of file fw_dma.h.

◆ DMA_ADC_SetConvTimes

#define DMA_ADC_SetConvTimes ( __TIMES__ )

Value:

                                                        do{   \
                                                        SFRX_ON(); \
                                                        DMA_ADC_CFG2 = DMA_ADC_CFG2 & ~(0x0F) | ((__TIMES__) & 0x0F); \
                                                        SFRX_OFF(); \
                                                    } while(0)

Definition at line 83 of file fw_dma.h.

◆ DMA_ADC_SetDstAddr

#define DMA_ADC_SetDstAddr ( __16BIT_ADDR__ )

Value:

                                                        do{   \
                                                        SFRX_ON(); \
                                                        (DMA_ADC_RXAH = ((__16BIT_ADDR__) >> 8)); \
                                                        (DMA_ADC_RXAL = ((__16BIT_ADDR__) & 0xFF)); \
                                                        SFRX_OFF(); \
                                                    } while(0)

Definition at line 77 of file fw_dma.h.

◆ DMA_ADC_SetEnabled

#define DMA_ADC_SetEnabled ( __STATE__ ) SFRX_ASSIGN(DMA_ADC_CR, 7, __STATE__)

Definition at line 74 of file fw_dma.h.

◆ DMA_ADC_Start

#define DMA_ADC_Start ( ) SFRX_SET(DMA_ADC_CR, 6)

Definition at line 75 of file fw_dma.h.

◆ DMA_M2M_ClearInterrupt

#define DMA_M2M_ClearInterrupt ( ) SFRX_RESET(DMA_M2M_STA, 0)

Definition at line 38 of file fw_dma.h.

◆ DMA_M2M_SetBusPriority

#define DMA_M2M_SetBusPriority ( __PRI__ ) SFRX_ASSIGN2BIT(DMA_M2M_CFG, 0, __PRI__)

Definition at line 35 of file fw_dma.h.

◆ DMA_M2M_SetDstAddr

#define DMA_M2M_SetDstAddr ( __16BIT_ADDR__ )

Value:

                                                        do{   \
                                                        SFRX_ON(); \
                                                        (DMA_M2M_RXAH = ((__16BIT_ADDR__) >> 8)); \
                                                        (DMA_M2M_RXAL = ((__16BIT_ADDR__) & 0xFF)); \
                                                        SFRX_OFF(); \
                                                    } while(0)

Definition at line 49 of file fw_dma.h.

◆ DMA_M2M_SetDstAddrIncrement

#define DMA_M2M_SetDstAddrIncrement ( __STATE__ ) SFRX_ASSIGN(DMA_M2M_CFG, 4, __STATE__)

Definition at line 34 of file fw_dma.h.

◆ DMA_M2M_SetEnabled

#define DMA_M2M_SetEnabled ( __STATE__ ) SFRX_ASSIGN(DMA_M2M_CR, 7, __STATE__)

Definition at line 36 of file fw_dma.h.

◆ DMA_M2M_SetSrcAddr

#define DMA_M2M_SetSrcAddr ( __16BIT_ADDR__ )

Value:

                                                        do{   \
                                                        SFRX_ON(); \
                                                        (DMA_M2M_TXAH = ((__16BIT_ADDR__) >> 8)); \
                                                        (DMA_M2M_TXAL = ((__16BIT_ADDR__) & 0xFF)); \
                                                        SFRX_OFF(); \
                                                    } while(0)

Definition at line 43 of file fw_dma.h.

◆ DMA_M2M_SetSrcAddrIncrement

#define DMA_M2M_SetSrcAddrIncrement ( __STATE__ ) SFRX_ASSIGN(DMA_M2M_CFG, 5, __STATE__)

Definition at line 33 of file fw_dma.h.

◆ DMA_M2M_SetTxLength

#define DMA_M2M_SetTxLength ( __LEN__ ) do{SFRX_ON(); DMA_M2M_AMT = (__LEN__); SFRX_OFF();}while(0)

Transfer size = LEN + 1

Definition at line 42 of file fw_dma.h.

◆ DMA_M2M_Start

#define DMA_M2M_Start ( ) SFRX_SET(DMA_M2M_CR, 6)

Definition at line 37 of file fw_dma.h.

Enumeration Type Documentation

◆ DMA_ADC_ConvTimes_t

enum DMA_ADC_ConvTimes_t

Enumerator
DMA_ADC_ConvTimes_1
DMA_ADC_ConvTimes_2
DMA_ADC_ConvTimes_4
DMA_ADC_ConvTimes_8
DMA_ADC_ConvTimes_16
DMA_ADC_ConvTimes_32
DMA_ADC_ConvTimes_64
DMA_ADC_ConvTimes_128
DMA_ADC_ConvTimes_256

Definition at line 60 of file fw_dma.h.

{
    DMA_ADC_ConvTimes_1     = 0x00,
    DMA_ADC_ConvTimes_2     = 0x08,
    DMA_ADC_ConvTimes_4     = 0x09,
    DMA_ADC_ConvTimes_8     = 0x0a,
    DMA_ADC_ConvTimes_16    = 0x0b,
    DMA_ADC_ConvTimes_32    = 0x0c,
    DMA_ADC_ConvTimes_64    = 0x0d,
    DMA_ADC_ConvTimes_128   = 0x0e,
    DMA_ADC_ConvTimes_256   = 0x0f,
} DMA_ADC_ConvTimes_t;

◆ DMA_BusPriority_t

enum DMA_BusPriority_t

Enumerator
DMA_BusPriority_Lowest
DMA_BusPriority_Low
DMA_BusPriority_High
DMA_BusPriority_Highest

Definition at line 21 of file fw_dma.h.

{
    DMA_BusPriority_Lowest  = 0x00,
    DMA_BusPriority_Low     = 0x01,
    DMA_BusPriority_High    = 0x02,
    DMA_BusPriority_Highest = 0x03,
} DMA_BusPriority_t;

Macros

Enumerations

Macro Definition Documentation

◆ DMA_ADC_ClearInterrupt

◆ DMA_ADC_EnableChannels

◆ DMA_ADC_SetBusPriority

◆ DMA_ADC_SetConvTimes

◆ DMA_ADC_SetDstAddr

◆ DMA_ADC_SetEnabled

◆ DMA_ADC_Start

◆ DMA_M2M_ClearInterrupt

◆ DMA_M2M_SetBusPriority

◆ DMA_M2M_SetDstAddr

◆ DMA_M2M_SetDstAddrIncrement

◆ DMA_M2M_SetEnabled

◆ DMA_M2M_SetSrcAddr

◆ DMA_M2M_SetSrcAddrIncrement

◆ DMA_M2M_SetTxLength

◆ DMA_M2M_Start

Enumeration Type Documentation

◆ DMA_ADC_ConvTimes_t

◆ DMA_BusPriority_t