ATY_LIB V2_102_230218
ATY_LIB for general devices or ALGO
 
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fw_i2c.h
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1// Copyright 2021 IOsetting <iosetting(at)outlook.com>
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#ifndef ___FW_I2C_H___
16#define ___FW_I2C_H___
17
18#include "fw_conf.h"
19#include "fw_types.h"
20
21typedef enum
22{
26
27typedef enum
28{
29 I2C_MasterCmd_Wait = 0x00, // Wait, idle
30 I2C_MasterCmd_Start = 0x01, // START
31 I2C_MasterCmd_Send = 0x02, /* Send data. This command will generate 8 clocks on SCL, and
32 send I2CTXD to SDA bit by bit from MSB */
33 I2C_MasterCmd_RxAck = 0x03, /* Recive Ack. This command will generate 1 clock on SCL, and
34 save the received bit to MSACKI(I2CMSST.1) */
35 I2C_MasterCmd_Recv = 0x04, // Recive data
36 I2C_MasterCmd_TxAck = 0x05, /* Send Ack. This command will generate 1 clock on SCL, and
37 write the bit value of MSACKO(I2CMSST.0) to SDA */
38 I2C_MasterCmd_Stop = 0x06, // STOP. This command will send STOP signal, and reset MSBUSY flag
39 I2C_MasterCmd_StartSendRxAck = 0x09, // START + Send data + RxAck
40 I2C_MasterCmd_SendRxAck = 0x0A, // Send data + RxAck
41 I2C_MasterCmd_RecvTxAck0 = 0x0B, // Receive data + TxAck(0)
42 I2C_MasterCmd_RecvNAck = 0x0C, // Receive data + NAck
44
45typedef enum
46{
47 // SCL SDA
53
59/* Compute i2c prescaler given frequency. If the result exceeds 63, i2c might not work as expeted */
60#define I2C_PRESCALER_COMPUTE(__FREQ__) ((((__SYSCLOCK / __FREQ__) / 2U) - 4U) / 2U)
61/* Compute i2c frequency given prescaler */
62#define I2C_FREQUENCY_COMPUTE(__PRESCALER__) ((__SYSCLOCK / 2U) / (((__PRESCALER__) * 2U) + 4U))
63
64#define I2C_SetEnabled(__STATE__) SFRX_ASSIGN(I2CCFG, 7, __STATE__)
65#define I2C_SetWorkMode(__MODE__) SFRX_ASSIGN(I2CCFG, 6, __MODE__)
66
71#define I2C_SetClockPrescaler(__DIV__) do { \
72 SFRX_ON(); \
73 (I2CCFG) = (I2CCFG) & ~(0x3F) | ((__DIV__) & 0x3F); \
74 SFRX_OFF(); \
75 } while(0)
76
77#define I2C_SendMasterCmd(__CMD__) { \
78 (I2CMSCR) = (I2CMSCR) & ~(0x0F) | ((__CMD__) & 0x0F); \
79 while (!(I2CMSST & 0x40)); \
80 I2CMSST &= ~0x40; \
81 }
82
83#define I2C_MasterStart() I2C_SendMasterCmd(I2C_MasterCmd_Start)
84#define I2C_MasterSendData(__DATA__) do{I2CTXD = (__DATA__); I2C_SendMasterCmd(I2C_MasterCmd_Send);}while(0)
85#define I2C_MasterRxAck() I2C_SendMasterCmd(I2C_MasterCmd_RxAck)
86#define I2C_MasterAck() do{I2CMSST &= ~(0x01); I2C_SendMasterCmd(I2C_MasterCmd_TxAck);}while(0)
87#define I2C_MasterNAck() do{I2CMSST |= 0x01; I2C_SendMasterCmd(I2C_MasterCmd_TxAck);}while(0)
88#define I2C_MasterStop() I2C_SendMasterCmd(I2C_MasterCmd_Stop)
89
93#define I2C_SetMasterAutoSend(__STATE__) SFRX_ASSIGN(I2CMSAUX, 0, __STATE__)
97#define I2C_IsMasterBusy() (I2CMSST & 0x80)
98#define I2C_ClearMasterCmdInterrupt() do {SFRX_ON(); I2CMSST &= ~(0x01 << 6); SFRX_OFF();} while(0)
99
100#define I2C_ResetSlaveMode() SFRX_SET(I2CSLCR, 0)
104#define I2C_IsSlaveBusy() (I2CSLST & (0x01 << 7))
105#define I2C_IsSlaveStartInterrupt() (I2CSLST & (0x01 << 6))
106#define I2C_ClearSlaveStartInterrupt() (I2CSLST &= ~(0x01 << 6))
107#define I2C_IsSlaveRecvInterrupt() (I2CSLST & (0x01 << 5))
108#define I2C_ClearSlaveRecvInterrupt() (I2CSLST &= ~(0x01 << 5))
109#define I2C_IsSlaveSendInterrupt() (I2CSLST & (0x01 << 4))
110#define I2C_ClearSlaveSendInterrupt() (I2CSLST &= ~(0x01 << 4))
111#define I2C_IsSlaveStopInterrupt() (I2CSLST & (0x01 << 3))
112#define I2C_ClearSlaveStopInterrupt() (I2CSLST &= ~(0x01 << 3))
113#define I2C_ReadSlaveAckIn() (I2CSLST & (0x01 << 1))
114#define I2C_ReadSlaveAckOut() (I2CSLST & (0x01 << 0))
115#define I2C_ClearAllSlaveInterrupts() (I2CSLST = 0x00)
116
117#define I2C_SetSlaveAddrControl(__STATE__) SFRX_ASSIGN(I2CSLADR, 0, __STATE__)
121#define I2C_SetPort(__ALTER_PORT__) (P_SW2 = P_SW2 & ~(0x03 << 4) | ((__ALTER_PORT__) << 4))
122
123
124uint8_t I2C_Write(uint8_t devAddr, uint8_t memAddr, uint8_t *dat, uint16_t size);
125uint8_t I2C_Read(uint8_t devAddr, uint8_t memAddr, uint8_t *buf, uint16_t size);
127uint8_t I2C_Read16BitAddr(uint8_t devAddr, uint16_t memAddr, uint8_t *buf, uint16_t size);
128
129#endif
__CODE int8_t dat[20]
I2C_MasterCmd_t
Definition: fw_i2c.h:28
@ I2C_MasterCmd_Wait
Definition: fw_i2c.h:29
@ I2C_MasterCmd_Recv
Definition: fw_i2c.h:35
@ I2C_MasterCmd_RecvNAck
Definition: fw_i2c.h:42
@ I2C_MasterCmd_RecvTxAck0
Definition: fw_i2c.h:41
@ I2C_MasterCmd_Stop
Definition: fw_i2c.h:38
@ I2C_MasterCmd_StartSendRxAck
Definition: fw_i2c.h:39
@ I2C_MasterCmd_Send
Definition: fw_i2c.h:31
@ I2C_MasterCmd_SendRxAck
Definition: fw_i2c.h:40
@ I2C_MasterCmd_RxAck
Definition: fw_i2c.h:33
@ I2C_MasterCmd_TxAck
Definition: fw_i2c.h:36
@ I2C_MasterCmd_Start
Definition: fw_i2c.h:30
uint8_t I2C_Read(uint8_t devAddr, uint8_t memAddr, uint8_t *buf, uint16_t size)
Definition: fw_i2c.c:36
uint8_t I2C_Write16BitAddr(uint8_t devAddr, uint16_t memAddr, uint8_t *dat, uint16_t size)
Definition: fw_i2c.c:65
I2C_WorkMode_t
Definition: fw_i2c.h:22
@ I2C_WorkMode_Slave
Definition: fw_i2c.h:23
@ I2C_WorkMode_Master
Definition: fw_i2c.h:24
I2C_AlterPort_t
Definition: fw_i2c.h:46
@ I2C_AlterPort_P32_P33
Definition: fw_i2c.h:51
@ I2C_AlterPort_P77_P76
Definition: fw_i2c.h:50
@ I2C_AlterPort_P25_P24
Definition: fw_i2c.h:49
@ I2C_AlterPort_P15_P14
Definition: fw_i2c.h:48
uint8_t I2C_Write(uint8_t devAddr, uint8_t memAddr, uint8_t *dat, uint16_t size)
Definition: fw_i2c.c:18
uint8_t I2C_Read16BitAddr(uint8_t devAddr, uint16_t memAddr, uint8_t *buf, uint16_t size)
Definition: fw_i2c.c:85
unsigned short uint16_t
Definition: fw_types.h:19
unsigned char uint8_t
Definition: fw_types.h:18