ATY_LIB V2_102_230218
ATY_LIB for general devices or ALGO
 
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fw_pwm.h
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1// Copyright 2021 IOsetting <iosetting(at)outlook.com>
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#ifndef ___FW_PWM_H___
16#define ___FW_PWM_H___
17
18#include "fw_conf.h"
19#include "fw_types.h"
20
21
22typedef enum
23{
34} PWM_Pin_t;
35
45typedef enum
46{
52
53typedef enum
54{
58
62typedef enum
63{
64 PWM_OutputMode_NoAction = 0x00, // Fixed
65 PWM_OutputMode_TriggerHigh = 0x01, // OCxREF=1 when PWMA_CCR1=PWMA_CNT
66 PWM_OutputMode_TriggerLow = 0x02, // OCxREF=0 when PWMA_CCR1=PWMA_CNT
67 PWM_OutputMode_TriggerToggle = 0x03, // Toggle OCxREF when PWMA_CCR1=PWMA_CNT
68 PWM_OutputMode_AlwaysLow = 0x04, // OCxREF always low
69 PWM_OutputMode_AlwaysHigh = 0x05, // OCxREF always high
70 PWM_OutputMode_PWM_HighIfLess = 0x06, // OCxREF=1 when PWMA_CNT<PWMA_CCR1, in both counting direction
71 PWM_OutputMode_PWM_LowIfLess = 0x07, // OCxREF=0 when PWMA_CNT<PWMA_CCR1, in both counting direction
73
74
75/**************************************************************************** /
76 * PWMA
77*/
78
87#define PWMA_SetPrescaler(__16BIT_VAL__) do { \
88 SFRX_ON(); \
89 (PWMA_PSCRH = ((__16BIT_VAL__) >> 8)); \
90 (PWMA_PSCRL = ((__16BIT_VAL__) & 0xFF)); \
91 SFRX_OFF(); \
92 }while(0)
93
94#define PWMA_SetPeriod(__16BIT_VAL__) do { \
95 SFRX_ON(); \
96 (PWMA_ARRH = ((__16BIT_VAL__) >> 8)); \
97 (PWMA_ARRL = ((__16BIT_VAL__) & 0xFF)); \
98 SFRX_OFF(); \
99 }while(0)
100
101// PWMA all pins input/output OFF/ON
102#define PWMA_SetOverallState(__STATE__) SFRX_ASSIGN(PWMA_BKR, 7, (__STATE__))
103
104// PWMA Pins Output OFF/ON
105#define PWMA_SetPinOutputState(__PINS__, __STATE__) do { \
106 SFRX_ON(); \
107 PWMA_ENO = PWMA_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
108 SFRX_OFF(); \
109 } while(0)
110
111// Enable/Disable PWMB_BKR Control on Pins
112#define PWMA_SetPinBrakeControl(__PINS__, __STATE__) do { \
113 SFRX_ON(); \
114 PWMA_IOAUX = PWMA_IOAUX & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
115 SFRX_OFF(); \
116 } while(0)
117
122#define PWMA_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMA_CR1, 7, (__STATE__))
123
127#define PWMA_SetEdgeAlignment(__ALIGN__) do{ \
128 SFRX_ON();(PWMA_CR1 = PWMA_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));SFRX_OFF(); \
129 }while(0)
130
135#define PWMA_SetCounterDirection(__DIR__) SFRX_ASSIGN(PWMA_CR1, 4, (__DIR__))
140#define PWMA_SetCounterOnePulse(__STATE__) SFRX_ASSIGN(PWMA_CR1, 3, (__STATE__))
146#define PWMA_SetUpdateEventSource(__STATE__) SFRX_ASSIGN(PWMA_CR1, 2, (__STATE__))
150#define PWMA_SetNonUpdateEvent(__STATE__) SFRX_ASSIGN(PWMA_CR1, 1, (__STATE__))
154#define PWMA_SetCounterState(__STATE__) SFRX_ASSIGN(PWMA_CR1, 0, (__STATE__))
155
159#define PWMA_PWM1_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER1, 0, (__STATE__))
160#define PWMA_PWM1_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER1, 1, (__POLAR__))
161#define PWMA_PWM1N_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER1, 2, (__STATE__))
162#define PWMA_PWM1N_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER1, 3, (__POLAR__))
163
164#define PWMA_PWM2_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER1, 4, (__STATE__))
165#define PWMA_PWM2_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER1, 5, (__POLAR__))
166#define PWMA_PWM2N_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER1, 6, (__STATE__))
167#define PWMA_PWM2N_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER1, 7, (__POLAR__))
168
169#define PWMA_PWM3_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER2, 0, (__STATE__))
170#define PWMA_PWM3_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER2, 1, (__POLAR__))
171#define PWMA_PWM3N_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER2, 2, (__STATE__))
172#define PWMA_PWM3N_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER2, 3, (__POLAR__))
173
174#define PWMA_PWM4_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER2, 4, (__STATE__))
175#define PWMA_PWM4_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER2, 5, (__POLAR__))
176#define PWMA_PWM4N_SetPortState(__STATE__) SFRX_ASSIGN(PWMA_CCER2, 6, (__STATE__))
177#define PWMA_PWM4N_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMA_CCER2, 7, (__POLAR__))
178
182typedef enum
183{
189
190#define PWMA_PWM1_SetPortDirection(__PORT_DIR__) do{ \
191 SFRX_ON();(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
192 }while(0)
193#define PWMA_PWM2_SetPortDirection(__PORT_DIR__) do{ \
194 SFRX_ON();(PWMA_CCMR2 = PWMA_CCMR2 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
195 }while(0)
196#define PWMA_PWM3_SetPortDirection(__PORT_DIR__) do{ \
197 SFRX_ON();(PWMA_CCMR3 = PWMA_CCMR3 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
198 }while(0)
199#define PWMA_PWM4_SetPortDirection(__PORT_DIR__) do{ \
200 SFRX_ON();(PWMA_CCMR4 = PWMA_CCMR4 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
201 }while(0)
202
208#define PWMA_PWM1_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMA_CCMR1, 3, (__STATE__))
209#define PWMA_PWM2_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMA_CCMR2, 3, (__STATE__))
210#define PWMA_PWM3_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMA_CCMR3, 3, (__STATE__))
211#define PWMA_PWM4_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMA_CCMR4, 3, (__STATE__))
212
216#define PWMA_PWM1_ConfigOutputMode(__MODE__) do{ \
217 SFRX_ON();(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
218 }while(0)
219#define PWMA_PWM2_ConfigOutputMode(__MODE__) do{ \
220 SFRX_ON();(PWMA_CCMR2 = PWMA_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
221 }while(0)
222#define PWMA_PWM3_ConfigOutputMode(__MODE__) do{ \
223 SFRX_ON();(PWMA_CCMR3 = PWMA_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
224 }while(0)
225#define PWMA_PWM4_ConfigOutputMode(__MODE__) do{ \
226 SFRX_ON();(PWMA_CCMR4 = PWMA_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
227 }while(0)
228
232#define PWMA_PWM1_SetCaptureCompareValue(__16BIT_VAL__) do{ \
233 SFRX_ON(); \
234 (PWMA_CCR1H = ((__16BIT_VAL__) >> 8)); \
235 (PWMA_CCR1L = ((__16BIT_VAL__) & 0xFF)); \
236 SFRX_OFF(); \
237 }while(0)
238#define PWMA_PWM2_SetCaptureCompareValue(__16BIT_VAL__) do{ \
239 SFRX_ON(); \
240 (PWMA_CCR2H = ((__16BIT_VAL__) >> 8)); \
241 (PWMA_CCR2L = ((__16BIT_VAL__) & 0xFF)); \
242 SFRX_OFF(); \
243 }while(0)
244#define PWMA_PWM3_SetCaptureCompareValue(__16BIT_VAL__) do{ \
245 SFRX_ON(); \
246 (PWMA_CCR3H = ((__16BIT_VAL__) >> 8)); \
247 (PWMA_CCR3L = ((__16BIT_VAL__) & 0xFF)); \
248 SFRX_OFF(); \
249 }while(0)
250#define PWMA_PWM4_SetCaptureCompareValue(__16BIT_VAL__) do{ \
251 SFRX_ON(); \
252 (PWMA_CCR4H = ((__16BIT_VAL__) >> 8)); \
253 (PWMA_CCR4L = ((__16BIT_VAL__) & 0xFF)); \
254 SFRX_OFF(); \
255 }while(0)
256
260typedef enum
261{
262 // PWM1P PWM1N
267
268typedef enum
269{
274
275typedef enum
276{
281
282typedef enum
283{
289
290// Alternative port selection
291#define PWMA_PWM1_SetPort(__ALTER_PORT__) do{ \
292 SFRX_ON();(PWMA_PS = PWMA_PS & ~(0x03 << 0) | ((__ALTER_PORT__) << 0)); SFRX_OFF(); \
293 }while(0)
294#define PWMA_PWM2_SetPort(__ALTER_PORT__) do{ \
295 SFRX_ON();(PWMA_PS = PWMA_PS & ~(0x03 << 2) | ((__ALTER_PORT__) << 2)); SFRX_OFF(); \
296 }while(0)
297#define PWMA_PWM3_SetPort(__ALTER_PORT__) do{ \
298 SFRX_ON();(PWMA_PS = PWMA_PS & ~(0x03 << 4) | ((__ALTER_PORT__) << 4)); SFRX_OFF(); \
299 }while(0)
300#define PWMA_PWM4_SetPort(__ALTER_PORT__) do{ \
301 SFRX_ON();(PWMA_PS = PWMA_PS & ~(0x03 << 6) | ((__ALTER_PORT__) << 6)); SFRX_OFF(); \
302 }while(0)
303
304
305
306/**************************************************************************** /
307 * PWMB
308*/
309
318#define PWMB_SetPrescaler(__16BIT_VAL__) do { \
319 SFRX_ON(); \
320 (PWMB_PSCRH = ((__16BIT_VAL__) >> 8)); \
321 (PWMB_PSCRL = ((__16BIT_VAL__) & 0xFF)); \
322 SFRX_OFF(); \
323 }while(0)
324
325#define PWMB_SetPeriod(__16BIT_VAL__) do { \
326 SFRX_ON(); \
327 (PWMB_ARRH = ((__16BIT_VAL__) >> 8)); \
328 (PWMB_ARRL = ((__16BIT_VAL__) & 0xFF)); \
329 SFRX_OFF(); \
330 }while(0)
331
332// PWMA all pins input/output OFF/ON
333#define PWMB_SetOverallState(__STATE__) SFRX_ASSIGN(PWMB_BKR, 7, (__STATE__))
334
335// PWMB Pins Output OFF/ON
336#define PWMB_SetPinOutputState(__PINS__, __STATE__) do { \
337 SFRX_ON(); \
338 PWMB_ENO = PWMB_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
339 SFRX_OFF(); \
340 } while(0)
341
342// Enable/Disable PWMB_BKR Control on Pins
343#define PWMB_SetPinBrakeControl(__PINS__, __STATE__) do { \
344 SFRX_ON(); \
345 PWMB_IOAUX = PWMB_IOAUX & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
346 SFRX_OFF(); \
347 } while(0)
348
353#define PWMB_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMB_CR1, 7, (__STATE__))
354
358#define PWMB_SetEdgeAlignment(__ALIGN__) do{ \
359 SFRX_ON();(PWMB_CR1 = PWMB_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));SFRX_OFF(); \
360 }while(0)
361
366#define PWMB_SetCounterDirection(__DIR__) SFRX_ASSIGN(PWMB_CR1, 4, (__DIR__))
371#define PWMB_SetCounterOnePulse(__STATE__) SFRX_ASSIGN(PWMB_CR1, 3, (__STATE__))
377#define PWMB_SetUpdateEventSource(__STATE__) SFRX_ASSIGN(PWMB_CR1, 2, (__STATE__))
381#define PWMB_SetNonUpdateEvent(__STATE__) SFRX_ASSIGN(PWMB_CR1, 1, (__STATE__))
385#define PWMB_SetCounterState(__STATE__) SFRX_ASSIGN(PWMB_CR1, 0, (__STATE__))
386
390#define PWMB_PWM1_SetPortState(__STATE__) SFRX_ASSIGN(PWMB_CCER1, 0, (__STATE__))
391#define PWMB_PWM1_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMB_CCER1, 1, (__POLAR__))
392
393#define PWMB_PWM2_SetPortState(__STATE__) SFRX_ASSIGN(PWMB_CCER1, 4, (__STATE__))
394#define PWMB_PWM2_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMB_CCER1, 5, (__POLAR__))
395
396#define PWMB_PWM3_SetPortState(__STATE__) SFRX_ASSIGN(PWMB_CCER2, 0, (__STATE__))
397#define PWMB_PWM3_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMB_CCER2, 1, (__POLAR__))
398
399#define PWMB_PWM4_SetPortState(__STATE__) SFRX_ASSIGN(PWMB_CCER2, 4, (__STATE__))
400#define PWMB_PWM4_SetPortPolar(__POLAR__) SFRX_ASSIGN(PWMB_CCER2, 5, (__POLAR__))
401
405typedef enum
406{
412
413#define PWMB_PWM1_SetPortDirection(__PORT_DIR__) do{ \
414 SFRX_ON();(PWMB_CCMR1 = PWMB_CCMR1 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
415 }while(0)
416#define PWMB_PWM2_SetPortDirection(__PORT_DIR__) do{ \
417 SFRX_ON();(PWMB_CCMR2 = PWMB_CCMR2 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
418 }while(0)
419#define PWMB_PWM3_SetPortDirection(__PORT_DIR__) do{ \
420 SFRX_ON();(PWMB_CCMR3 = PWMB_CCMR3 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
421 }while(0)
422#define PWMB_PWM4_SetPortDirection(__PORT_DIR__) do{ \
423 SFRX_ON();(PWMB_CCMR4 = PWMB_CCMR4 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); SFRX_OFF(); \
424 }while(0)
425
431#define PWMB_PWM1_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR1, 3, (__STATE__))
432#define PWMB_PWM2_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR2, 3, (__STATE__))
433#define PWMB_PWM3_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR3, 3, (__STATE__))
434#define PWMB_PWM4_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR4, 3, (__STATE__))
435
439#define PWMB_PWM1_ConfigOutputMode(__MODE__) do{ \
440 SFRX_ON();(PWMB_CCMR1 = PWMB_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
441 }while(0)
442#define PWMB_PWM2_ConfigOutputMode(__MODE__) do{ \
443 SFRX_ON();(PWMB_CCMR2 = PWMB_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
444 }while(0)
445#define PWMB_PWM3_ConfigOutputMode(__MODE__) do{ \
446 SFRX_ON();(PWMB_CCMR3 = PWMB_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
447 }while(0)
448#define PWMB_PWM4_ConfigOutputMode(__MODE__) do{ \
449 SFRX_ON();(PWMB_CCMR4 = PWMB_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); SFRX_OFF(); \
450 }while(0)
451
455#define PWMB_PWM1_SetCaptureCompareValue(__16BIT_VAL__) do{ \
456 SFRX_ON(); \
457 (PWMB_CCR5H = ((__16BIT_VAL__) >> 8)); \
458 (PWMB_CCR5L = ((__16BIT_VAL__) & 0xFF)); \
459 SFRX_OFF(); \
460 }while(0)
461#define PWMB_PWM2_SetCaptureCompareValue(__16BIT_VAL__) do{ \
462 SFRX_ON(); \
463 (PWMB_CCR6H = ((__16BIT_VAL__) >> 8)); \
464 (PWMB_CCR6L = ((__16BIT_VAL__) & 0xFF)); \
465 SFRX_OFF(); \
466 }while(0)
467#define PWMB_PWM3_SetCaptureCompareValue(__16BIT_VAL__) do{ \
468 SFRX_ON(); \
469 (PWMB_CCR7H = ((__16BIT_VAL__) >> 8)); \
470 (PWMB_CCR7L = ((__16BIT_VAL__) & 0xFF)); \
471 SFRX_OFF(); \
472 }while(0)
473#define PWMB_PWM4_SetCaptureCompareValue(__16BIT_VAL__) do{ \
474 SFRX_ON(); \
475 (PWMB_CCR8H = ((__16BIT_VAL__) >> 8)); \
476 (PWMB_CCR8L = ((__16BIT_VAL__) & 0xFF)); \
477 SFRX_OFF(); \
478 }while(0)
479
480typedef enum
481{
487
488typedef enum
489{
495
496typedef enum
497{
503
504typedef enum
505{
511
512// Alternative port selection
513#define PWMB_PWM1_SetPort(__ALTER_PORT__) do{ \
514 SFRX_ON();(PWMB_PS = PWMB_PS & ~(0x03 << 0) | ((__ALTER_PORT__) << 0)); SFRX_OFF(); \
515 }while(0)
516#define PWMB_PWM2_SetPort(__ALTER_PORT__) do{ \
517 SFRX_ON();(PWMB_PS = PWMB_PS & ~(0x03 << 2) | ((__ALTER_PORT__) << 2)); SFRX_OFF(); \
518 }while(0)
519#define PWMB_PWM3_SetPort(__ALTER_PORT__) do{ \
520 SFRX_ON();(PWMB_PS = PWMB_PS & ~(0x03 << 4) | ((__ALTER_PORT__) << 4)); SFRX_OFF(); \
521 }while(0)
522#define PWMB_PWM4_SetPort(__ALTER_PORT__) do{ \
523 SFRX_ON();(PWMB_PS = PWMB_PS & ~(0x03 << 6) | ((__ALTER_PORT__) << 6)); SFRX_OFF(); \
524 }while(0)
525
526
527#endif
PWMA_PWM4_AlterPort_t
Definition: fw_pwm.h:283
@ PWMA_PWM4_AlterPort_P66_P67
Definition: fw_pwm.h:286
@ PWMA_PWM4_AlterPort_P34_P33
Definition: fw_pwm.h:287
@ PWMA_PWM4_AlterPort_P16_P17
Definition: fw_pwm.h:284
@ PWMA_PWM4_AlterPort_P26_P27
Definition: fw_pwm.h:285
PWMB_PWM8_AlterPort_t
Definition: fw_pwm.h:505
@ PWMB_PWM8_AlterPort_P03
Definition: fw_pwm.h:508
@ PWMB_PWM8_AlterPort_P23
Definition: fw_pwm.h:506
@ PWMB_PWM8_AlterPort_P77
Definition: fw_pwm.h:509
@ PWMB_PWM8_AlterPort_P34
Definition: fw_pwm.h:507
PWM_OutputMode_t
Definition: fw_pwm.h:63
@ PWM_OutputMode_PWM_LowIfLess
Definition: fw_pwm.h:71
@ PWM_OutputMode_TriggerLow
Definition: fw_pwm.h:66
@ PWM_OutputMode_AlwaysLow
Definition: fw_pwm.h:68
@ PWM_OutputMode_NoAction
Definition: fw_pwm.h:64
@ PWM_OutputMode_TriggerToggle
Definition: fw_pwm.h:67
@ PWM_OutputMode_AlwaysHigh
Definition: fw_pwm.h:69
@ PWM_OutputMode_TriggerHigh
Definition: fw_pwm.h:65
@ PWM_OutputMode_PWM_HighIfLess
Definition: fw_pwm.h:70
PWMB_PWM5_AlterPort_t
Definition: fw_pwm.h:481
@ PWMB_PWM5_AlterPort_P74
Definition: fw_pwm.h:485
@ PWMB_PWM5_AlterPort_P00
Definition: fw_pwm.h:484
@ PWMB_PWM5_AlterPort_P20
Definition: fw_pwm.h:482
@ PWMB_PWM5_AlterPort_P17
Definition: fw_pwm.h:483
PWMA_PortDirection_t
Definition: fw_pwm.h:183
@ PWMA_PortDirOut
Definition: fw_pwm.h:184
@ PWMA_PortDirInTRC
Definition: fw_pwm.h:187
@ PWMA_PortDirIn_TI2FP1_TI1FP2_TI4FP3_TI3FP4
Definition: fw_pwm.h:186
@ PWMA_PortDirIn_TI1FP1_TI2FP2_TI3FP3_TI4FP4
Definition: fw_pwm.h:185
PWMA_PWM2_AlterPort_t
Definition: fw_pwm.h:269
@ PWMA_PWM2_AlterPort_P22_P23
Definition: fw_pwm.h:271
@ PWMA_PWM2_AlterPort_P12P54_P13
Definition: fw_pwm.h:270
@ PWMA_PWM2_AlterPort_P62_P63
Definition: fw_pwm.h:272
PWMB_PWM7_AlterPort_t
Definition: fw_pwm.h:497
@ PWMB_PWM7_AlterPort_P33
Definition: fw_pwm.h:499
@ PWMB_PWM7_AlterPort_P76
Definition: fw_pwm.h:501
@ PWMB_PWM7_AlterPort_P22
Definition: fw_pwm.h:498
@ PWMB_PWM7_AlterPort_P02
Definition: fw_pwm.h:500
PWMA_PWM1_AlterPort_t
Definition: fw_pwm.h:261
@ PWMA_PWM1_AlterPort_P10_P11
Definition: fw_pwm.h:263
@ PWMA_PWM1_AlterPort_P20_P21
Definition: fw_pwm.h:264
@ PWMA_PWM1_AlterPort_P60_P61
Definition: fw_pwm.h:265
PWMB_PWM6_AlterPort_t
Definition: fw_pwm.h:489
@ PWMB_PWM6_AlterPort_P75
Definition: fw_pwm.h:493
@ PWMB_PWM6_AlterPort_P54
Definition: fw_pwm.h:491
@ PWMB_PWM6_AlterPort_P01
Definition: fw_pwm.h:492
@ PWMB_PWM6_AlterPort_P21
Definition: fw_pwm.h:490
PWMB_PortDirection_t
Definition: fw_pwm.h:406
@ PWMB_PortDirInTRC
Definition: fw_pwm.h:410
@ PWMB_PortDirIn_TI5FP5_TI6FP6_TI7FP7_TI8FP8
Definition: fw_pwm.h:408
@ PWMB_PortDirIn_TI6FP5_TI5FP6_TI8FP7_TI7FP8
Definition: fw_pwm.h:409
@ PWMB_PortDirOut
Definition: fw_pwm.h:407
PWM_CounterDirection_t
Definition: fw_pwm.h:54
@ PWM_CounterDirection_Up
Definition: fw_pwm.h:55
@ PWM_CounterDirection_Down
Definition: fw_pwm.h:56
PWM_Pin_t
Definition: fw_pwm.h:23
@ PWMB_Pin_All
Definition: fw_pwm.h:33
@ PWM_Pin_1N
Definition: fw_pwm.h:25
@ PWM_Pin_2N
Definition: fw_pwm.h:27
@ PWM_Pin_2
Definition: fw_pwm.h:26
@ PWM_Pin_3N
Definition: fw_pwm.h:29
@ PWM_Pin_3
Definition: fw_pwm.h:28
@ PWM_Pin_4
Definition: fw_pwm.h:30
@ PWM_Pin_4N
Definition: fw_pwm.h:31
@ PWM_Pin_1
Definition: fw_pwm.h:24
@ PWMA_Pin_All
Definition: fw_pwm.h:32
PWM_EdgeAlignment_t
Definition: fw_pwm.h:46
@ PWM_EdgeAlignment_CenterBoth
Definition: fw_pwm.h:50
@ PWM_EdgeAlignment_CenterUp
Definition: fw_pwm.h:49
@ PWM_EdgeAlignment_Side
Definition: fw_pwm.h:47
@ PWM_EdgeAlignment_CenterDown
Definition: fw_pwm.h:48
PWMA_PWM3_AlterPort_t
Definition: fw_pwm.h:276
@ PWMA_PWM3_AlterPort_P24_P25
Definition: fw_pwm.h:278
@ PWMA_PWM3_AlterPort_P14_P15
Definition: fw_pwm.h:277
@ PWMA_PWM3_AlterPort_P64_P65
Definition: fw_pwm.h:279
#define B00010000
Definition: fw_types.h:40
#define B11111111
Definition: fw_types.h:65
#define B00100000
Definition: fw_types.h:45
#define B01010101
Definition: fw_types.h:66
#define B00001000
Definition: fw_types.h:36
#define B00000001
Definition: fw_types.h:30
#define B00000010
Definition: fw_types.h:31
#define B10000000
Definition: fw_types.h:58
#define B00000100
Definition: fw_types.h:33
#define B01000000
Definition: fw_types.h:51