ATY_LIB V2_102_230218
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fw_reg_base.h
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1// Copyright 2021 IOsetting <iosetting(at)outlook.com>
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#ifndef __FW_REG_BASE_H__
16#define __FW_REG_BASE_H__
17
18#if defined (__SDCC_SYNTAX_FIX)
19 #include <stdbool.h>
20 #include <lint.h>
21 # warning unrecognized compiler
22 #define __BIT bool
23 #define __DATA
24 #define __IDATA
25 #define __PDATA
26 #define __XDATA
27 #define __CODE
28 #define __REENTRANT
29 #define SBIT(name, addr, bit) volatile bool name
30 #define SFR(name, addr) volatile unsigned char name
31 #define SFRX(addr) (*(unsigned char volatile *)(addr))
32 #define SFR16X(addr) (*(unsigned char volatile *)(addr))
33 #define INTERRUPT(name, vector) void name (void)
34 #define INTERRUPT_USING(name, vector, regnum) void name (void)
35 #define NOP()
36
37#elif defined (SDCC) || defined (__SDCC)
38 #define __BIT __bit
39 #define __DATA __data
40 #define __IDATA __idata
41 #define __PDATA __pdata
42 #define __XDATA __xdata
43 #define __CODE __code
44 #define __REENTRANT __reentrant
45 #define SBIT(name, addr, bit) __sbit __at(addr+bit) name
46 #define SFR(name, addr) __sfr __at(addr) name
47 #define SFRX(addr) (*(unsigned char volatile __xdata *)(addr))
48 #define SFR16X(addr) (*(unsigned int volatile __xdata *)(addr))
49
50 #define INTERRUPT(name, vector) void name (void) __interrupt (vector)
51 #define INTERRUPT_USING(name, vector, regnum) void name (void) __interrupt (vector) __using (regnum)
52 #define NOP() __asm NOP __endasm
53
54#elif defined __CX51__ || defined __C51__
55 #define __BIT bit
56 #define __DATA data
57 #define __IDATA idata
58 #define __PDATA pdata
59 #define __XDATA xdata
60 #define __CODE code
61 #define __REENTRANT reentrant
62 #define SBIT(name, addr, bit) sbit name = addr^bit
63 #define SFR(name, addr) sfr name = addr
64 #define SFRX(addr) (*(unsigned char volatile xdata *)(addr))
65 #define SFR16X(addr) (*(unsigned int volatile xdata *)(addr))
66
67 #define INTERRUPT(name, vector) void name (void) interrupt vector
68 #define INTERRUPT_USING(name, vector, regnum) void name (void) interrupt vector using regnum
69 extern void _nop_ (void);
70 #define NOP() _nop_()
71
72#endif
73
74#define _P0 0x80
75SFR(P0, _P0);
76SBIT(P00, _P0, 0);
77SBIT(P01, _P0, 1);
78SBIT(P02, _P0, 2);
79SBIT(P03, _P0, 3);
80SBIT(P04, _P0, 4);
81SBIT(P05, _P0, 5);
82SBIT(P06, _P0, 6);
83SBIT(P07, _P0, 7);
84SFR(SP, 0x81);
85SFR(DPL, 0x82);
86SFR(DPH, 0x83);
87SFR(S4CON, 0x84);
88SFR(S4BUF, 0x85);
89SFR(PCON, 0x87);
90
91#define _TCON 0x88
92SFR(TCON, _TCON);
93SBIT(TF1, _TCON, 7);
94SBIT(TR1, _TCON, 6);
95SBIT(TF0, _TCON, 5);
96SBIT(TR0, _TCON, 4);
97SBIT(IE1, _TCON, 3);
98SBIT(IT1, _TCON, 2);
99SBIT(IE0, _TCON, 1);
100SBIT(IT0, _TCON, 0);
101SFR(TMOD, 0x89);
102
103SFR(TL0, 0x8A);
104SFR(TL1, 0x8B);
105SFR(TH0, 0x8C);
106SFR(TH1, 0x8D);
107SFR(AUXR, 0x8E);
108SFR(INTCLKO, 0x8F);
109
110#define _P1 0x90
111SFR(P1, _P1);
112SBIT(P10, _P1, 0);
113SBIT(P11, _P1, 1);
114SBIT(P12, _P1, 2);
115SBIT(P13, _P1, 3);
116SBIT(P14, _P1, 4);
117SBIT(P15, _P1, 5);
118SBIT(P16, _P1, 6);
119SBIT(P17, _P1, 7);
120SFR(P1M1, 0x91);
121SFR(P1M0, 0x92);
122SFR(P0M1, 0x93);
123SFR(P0M0, 0x94);
124SFR(P2M1, 0x95);
125SFR(P2M0, 0x96);
126
127#define _SCON 0x98
128SFR(SCON, _SCON);
129SBIT(SM0, _SCON, 7);
130SBIT(SM1, _SCON, 6);
131SBIT(SM2, _SCON, 5);
132SBIT(REN, _SCON, 4);
133SBIT(TB8, _SCON, 3);
134SBIT(RB8, _SCON, 2);
135SBIT(TI, _SCON, 1);
136SBIT(RI, _SCON, 0);
137SFR(SBUF, 0x99);
138SFR(S2CON, 0x9A);
139SFR(S2BUF, 0x9B);
140SFR(IRCBAND, 0x9D);
141SFR(LIRTRIM, 0x9E);
142SFR(IRTRIM, 0x9F);
143
144#define _P2 0xA0
145SFR(P2, _P2);
146SBIT(P20, _P2, 0);
147SBIT(P21, _P2, 1);
148SBIT(P22, _P2, 2);
149SBIT(P23, _P2, 3);
150SBIT(P24, _P2, 4);
151SBIT(P25, _P2, 5);
152SBIT(P26, _P2, 6);
153SBIT(P27, _P2, 7);
154SFR(BUS_SPEED, 0xA1);
155SFR(P_SW1, 0xA2);
156
157#define _IE 0xA8
158SFR(IE, _IE);
159SBIT(EA, _IE, 7);
160SBIT(ELVD, _IE, 6);
161SBIT(EADC, _IE, 5);
162SBIT(ES, _IE, 4);
163SBIT(ET1, _IE, 3);
164SBIT(EX1, _IE, 2);
165SBIT(ET0, _IE, 1);
166SBIT(EX0, _IE, 0);
167SFR(SADDR, 0xA9);
168SFR(WKTCL, 0xAA);
169SFR(WKTCH, 0xAB);
170SFR(S3CON, 0xAC);
171SFR(S3BUF, 0xAD);
172SFR(TA, 0xAE);
173SFR(IE2, 0xAF);
174
175#define _P3 0xB0
176SFR(P3, _P3);
177SBIT(P30, _P3, 0);
178SBIT(P31, _P3, 1);
179SBIT(P32, _P3, 2);
180SBIT(P33, _P3, 3);
181SBIT(P34, _P3, 4);
182SBIT(P35, _P3, 5);
183SBIT(P36, _P3, 6);
184SBIT(P37, _P3, 7);
185SFR(P3M1, 0xB1);
186SFR(P3M0, 0xB2);
187SFR(P4M1, 0xB3);
188SFR(P4M0, 0xB4);
189SFR(IP2, 0xB5);
190SFR(IP2H, 0xB6);
191SFR(IPH, 0xB7);
192
193#define _IP 0xB8
194SFR(IP, _IP);
195SBIT(PPCA, _IP, 7);
196SBIT(PLVD, _IP, 6);
197SBIT(PADC, _IP, 5);
198SBIT(PS, _IP, 4);
199SBIT(PT1, _IP, 3);
200SBIT(PX1, _IP, 2);
201SBIT(PT0, _IP, 1);
202SBIT(PX0, _IP, 0);
203SFR(SADEN, 0xB9);
204SFR(P_SW2, 0xBA);
205SFR(ADC_CONTR, 0xBC);
206SFR(ADC_RES, 0xBD);
207SFR(ADC_RESL, 0xBE);
208
209#define _P4 0xC0
210SFR(P4, _P4);
211SBIT(P40, _P4, 0);
212SBIT(P41, _P4, 1);
213SBIT(P42, _P4, 2);
214SBIT(P43, _P4, 3);
215SBIT(P44, _P4, 4);
216SBIT(P45, _P4, 5);
217SBIT(P46, _P4, 6);
218SBIT(P47, _P4, 7);
219SFR(WDT_CONTR, 0xC1);
220SFR(IAP_DATA, 0xC2);
221SFR(IAP_ADDRH, 0xC3);
222SFR(IAP_ADDRL, 0xC4);
223SFR(IAP_CMD, 0xC5);
224SFR(IAP_TRIG, 0xC6);
225SFR(IAP_CONTR, 0xC7);
226
227#define _P5 0xC8
228SFR(P5, _P5);
229SBIT(P50, _P5, 0);
230SBIT(P51, _P5, 1);
231SBIT(P52, _P5, 2);
232SBIT(P53, _P5, 3);
233SBIT(P54, _P5, 4);
234SBIT(P55, _P5, 5);
235SBIT(P56, _P5, 6);
236SBIT(P57, _P5, 7);
237SFR(P5M1, 0xC9);
238SFR(P5M0, 0xCA);
239SFR(P6M1, 0xCB);
240SFR(P6M0, 0xCC);
241SFR(SPSTAT, 0xCD);
242SFR(SPCTL, 0xCE);
243SFR(SPDAT, 0xCF);
244
245#define _PSW 0xD0
246SFR(PSW, _PSW);
247SBIT(CY, _PSW, 7);
248SBIT(AC, _PSW, 6);
249SBIT(F0, _PSW, 5);
250SBIT(RS1, _PSW, 4);
251SBIT(RS0, _PSW, 3);
252SBIT(OV, _PSW, 2);
253SBIT(F1, _PSW, 1);
254SBIT(P, _PSW, 0);
255SFR(T4T3M, 0xD1);
256SFR(T4H, 0xD2);
257SFR(T4L, 0xD3);
258SFR(T3H, 0xD4);
259SFR(T3L, 0xD5);
260SFR(T2H, 0xD6);
261SFR(T2L, 0xD7);
262
263SFR(ACC, 0xE0);
264
265#define _P6 0xE8
266SFR(P6, _P6);
267SBIT(P60, _P6, 0);
268SBIT(P61, _P6, 1);
269SBIT(P62, _P6, 2);
270SBIT(P63, _P6, 3);
271SBIT(P64, _P6, 4);
272SBIT(P65, _P6, 5);
273SBIT(P66, _P6, 6);
274SBIT(P67, _P6, 7);
275
276SFR(B, 0xF0);
277
278#define _P7 0xF8
279SFR(P7, _P7);
280SBIT(P70, _P7, 0);
281SBIT(P71, _P7, 1);
282SBIT(P72, _P7, 2);
283SBIT(P73, _P7, 3);
284SBIT(P74, _P7, 4);
285SBIT(P75, _P7, 5);
286SBIT(P76, _P7, 6);
287SBIT(P77, _P7, 7);
288
289#endif
#define _TCON
Definition: fw_reg_base.h:91
#define _P5
Definition: fw_reg_base.h:227
#define _P7
Definition: fw_reg_base.h:278
#define _P4
Definition: fw_reg_base.h:209
#define _P2
Definition: fw_reg_base.h:144
#define _IE
Definition: fw_reg_base.h:157
#define _P0
Definition: fw_reg_base.h:74
#define _SCON
Definition: fw_reg_base.h:127
#define _P6
Definition: fw_reg_base.h:265
SBIT(P00, _P0, 0)
#define _PSW
Definition: fw_reg_base.h:245
#define _IP
Definition: fw_reg_base.h:193
SFR(P0, _P0)
#define _P3
Definition: fw_reg_base.h:175
#define _P1
Definition: fw_reg_base.h:110