#include "fw_conf.h"
#include "fw_types.h"
Go to the source code of this file.
|
| #define | SPI_RxTxFinished() (SPSTAT & 0x80) |
| |
| #define | SPI_ClearInterrupt() SFR_SET(SPSTAT, 7) |
| |
| #define | SPI_ClearWriteConflictInterrupt() SFR_SET(SPSTAT, 6) |
| |
| #define | SPI_ClearInterrupts() (SPSTAT |= 0xC0) |
| |
| #define | SPI_IgnoreSlaveSelect(__STATE__) SFR_ASSIGN(SPCTL, 7, __STATE__) |
| |
| #define | SPI_SetEnabled(__STATE__) SFR_ASSIGN(SPCTL, 6, __STATE__) |
| |
| #define | SPI_SetDataOrder(__ORDER__) SFR_ASSIGN(SPCTL, 5, __ORDER__) |
| |
| #define | SPI_SetMasterMode(__STATE__) SFR_ASSIGN(SPCTL, 4, __STATE__) |
| |
| #define | SPI_SetClockPolarity(__STATE__) SFR_ASSIGN(SPCTL, 3, __STATE__) |
| |
| #define | SPI_SetClockPhase(__PHASE__) SFR_ASSIGN(SPCTL, 2, __PHASE__) |
| |
| #define | SPI_SetClockPrescaler(__PRE_SCALER__) (SPCTL = SPCTL & ~0x03 | ((__PRE_SCALER__) << 0)) |
| |
| #define | SPI_SetPort(__ALTER_PORT__) (P_SW1 = P_SW1 & ~(0x03 << 2) | ((__ALTER_PORT__) << 2)) |
| |
◆ SPI_ClearInterrupt
| #define SPI_ClearInterrupt |
( |
| ) |
SFR_SET(SPSTAT, 7) |
◆ SPI_ClearInterrupts
| #define SPI_ClearInterrupts |
( |
| ) |
(SPSTAT |= 0xC0) |
◆ SPI_ClearWriteConflictInterrupt
| #define SPI_ClearWriteConflictInterrupt |
( |
| ) |
SFR_SET(SPSTAT, 6) |
◆ SPI_IgnoreSlaveSelect
| #define SPI_IgnoreSlaveSelect |
( |
|
__STATE__ | ) |
SFR_ASSIGN(SPCTL, 7, __STATE__) |
◆ SPI_RxTxFinished
| #define SPI_RxTxFinished |
( |
| ) |
(SPSTAT & 0x80) |
◆ SPI_SetClockPhase
| #define SPI_SetClockPhase |
( |
|
__PHASE__ | ) |
SFR_ASSIGN(SPCTL, 2, __PHASE__) |
Clock Phase (CPHA) 0: bits are sampled on the leading clock edge 1: bits are sampled on the trailing clock edge
Definition at line 84 of file fw_spi.h.
◆ SPI_SetClockPolarity
| #define SPI_SetClockPolarity |
( |
|
__STATE__ | ) |
SFR_ASSIGN(SPCTL, 3, __STATE__) |
Clock Polarity, CPOL 0: clock line idles low 1: clock line idles high
Definition at line 78 of file fw_spi.h.
◆ SPI_SetClockPrescaler
| #define SPI_SetClockPrescaler |
( |
|
__PRE_SCALER__ | ) |
(SPCTL = SPCTL & ~0x03 | ((__PRE_SCALER__) << 0)) |
◆ SPI_SetDataOrder
| #define SPI_SetDataOrder |
( |
|
__ORDER__ | ) |
SFR_ASSIGN(SPCTL, 5, __ORDER__) |
◆ SPI_SetEnabled
| #define SPI_SetEnabled |
( |
|
__STATE__ | ) |
SFR_ASSIGN(SPCTL, 6, __STATE__) |
◆ SPI_SetMasterMode
| #define SPI_SetMasterMode |
( |
|
__STATE__ | ) |
SFR_ASSIGN(SPCTL, 4, __STATE__) |
◆ SPI_SetPort
| #define SPI_SetPort |
( |
|
__ALTER_PORT__ | ) |
(P_SW1 = P_SW1 & ~(0x03 << 2) | ((__ALTER_PORT__) << 2)) |
Alternative ports
Definition at line 92 of file fw_spi.h.
◆ SPI_AlterPort_t
STC8H1K08(TSSOP20) STC8H3K32S2(TSSOP20) #1 #4 #1 #3 #4 SPI SS -> 1 16 19 7 16(P35) SPI MOSI -> 2 15 15(P34) SPI MISO -> 3 14 14(P33) SPI CLK -> 4 13 13(P32)
The ports for STC8G1K08-8Pin, STC8G1K08A are different: SS MO MI SCLK 00 - P5.5 P5.4 P3.3 P3.2, 01/10/11 - n/a
| Enumerator |
|---|
| SPI_AlterPort_P12P54_P13_P14_P15 | |
| SPI_AlterPort_P22_P23_P24_P25 | |
| SPI_AlterPort_P54_P40_P41_P43 | |
| SPI_AlterPort_P35_P34_P33_P32 | |
| SPI_AlterPort_8G1K08_8Pin | |
Definition at line 33 of file fw_spi.h.
34{
35
@ SPI_AlterPort_P22_P23_P24_P25
@ SPI_AlterPort_P35_P34_P33_P32
@ SPI_AlterPort_8G1K08_8Pin
@ SPI_AlterPort_P54_P40_P41_P43
@ SPI_AlterPort_P12P54_P13_P14_P15
◆ SPI_ClockPhase_t
| Enumerator |
|---|
| SPI_ClockPhase_LeadingEdge | |
| SPI_ClockPhase_TrailingEdge | |
Definition at line 51 of file fw_spi.h.
52{
@ SPI_ClockPhase_TrailingEdge
@ SPI_ClockPhase_LeadingEdge
◆ SPI_ClockPreScaler_t
| Enumerator |
|---|
| SPI_ClockPreScaler_4 | |
| SPI_ClockPreScaler_8 | |
| SPI_ClockPreScaler_16 | |
| SPI_ClockPreScaler_32or2 | |
Definition at line 43 of file fw_spi.h.
44{
@ SPI_ClockPreScaler_32or2
◆ SPI_DataOrder_t
| Enumerator |
|---|
| SPI_DataOrder_MSB | |
| SPI_DataOrder_LSB | |
Definition at line 57 of file fw_spi.h.
◆ SPI_TxRx()
Definition at line 20 of file fw_spi.c.
21{
25 return SPDAT;
26}
#define SPI_ClearInterrupts()
#define SPI_RxTxFinished()
◆ SPI_TxRxBytes()
Definition at line 28 of file fw_spi.c.
29{
30 while(len--)
31 {
33 }
34}
uint8_t SPI_TxRx(uint8_t dat)