ATY_LIB V2_102_230218
ATY_LIB for general devices or ALGO
 
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fw_util.c
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1// Copyright 2021 IOsetting <iosetting(at)outlook.com>
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#include "fw_util.h"
16#include "fw_sys.h"
17
18__CODE char HEX_TABLE[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
19
21{
22 SCON = 0x50; //8 bits and variable baudrate
23 AUXR |= 0x40; //imer clock is 1T mode
24 AUXR &= 0xFE; //UART 1 use Timer1 as baudrate generator
25 TMOD &= 0x0F; //Set timer work mode
26 TL1 = 0x8F; //Initial timer value
27 TH1 = 0xFD; //Initial timer value
28 ET1 = 0; //Disable Timer%d interrupt
29 TR1 = 1; //Timer1 start run
30}
31
33{
34 SCON = 0x50; //8 bits and variable baudrate
35 AUXR |= 0x40; //imer clock is 1T mode
36 AUXR &= 0xFE; //UART 1 use Timer1 as baudrate generator
37 TMOD &= 0x0F; //Set timer work mode
38 TL1 = 0xCC; //Initial timer value
39 TH1 = 0xFF; //Initial timer value
40 ET1 = 0; //Disable Timer%d interrupt
41 TR1 = 1; //Timer1 start run
42}
43
45{
46 SCON = 0x50; //8 bits and variable baudrate
47 AUXR |= 0x40; //imer clock is 1T mode
48 AUXR &= 0xFE; //UART 1 use Timer1 as baudrate generator
49 TMOD &= 0x0F; //Set timer work mode
50 TL1 = 0xA0; //Initial timer value
51 TH1 = 0xFC; //Initial timer value
52 ET1 = 0; //Disable Timer%d interrupt
53 TR1 = 1; //Timer1 start run
54}
55
57{
58 SCON = 0x50;
59 AUXR |= 0x40;
60 AUXR &= 0xFE;
61 TMOD &= 0x0F;
62 TL1 = 0xB8;
63 TH1 = 0xFF;
64 ET1 = 0;
65 TR1 = 1;
66}
67
69{
70 SCON = 0x50;
71 AUXR |= 0x40;
72 AUXR &= 0xFE;
73 TMOD &= 0x0F;
74 TL1 = 0x70;
75 TH1 = 0xFC;
76 ET1 = 0;
77 TR1 = 1;
78}
79
81{
82 SCON = 0x50;
83 AUXR |= 0x40;
84 AUXR &= 0xFE;
85 TMOD &= 0x0F;
86 TL1 = 0x40;
87 TH1 = 0xFC;
88 ET1 = 0;
89 TR1 = 1;
90}
91
93{
94 SCON = 0x50;
95 AUXR |= 0x40;
96 AUXR &= 0xFE;
97 TMOD &= 0x0F;
98 TL1 = 0xB0;
99 TH1 = 0xFF;
100 ET1 = 0;
101 TR1 = 1;
102}
void UTIL_Uart1_35M_9600_Init(void)
Definition: fw_util.c:68
void UTIL_Uart1_33M1776_9600_Init(void)
Definition: fw_util.c:44
void UTIL_Uart1_24M_115200_Init(void)
Definition: fw_util.c:32
__CODE char HEX_TABLE[16]
Definition: fw_util.c:18
void UTIL_Uart1_33M1776_115200_Init(void)
Definition: fw_util.c:56
void UTIL_Uart1_36M864_115200_Init(void)
Definition: fw_util.c:92
void UTIL_Uart1_24M_9600_Init(void)
Definition: fw_util.c:20
void UTIL_Uart1_36M864_9600_Init(void)
Definition: fw_util.c:80