Go to the source code of this file.
|
| enum | ADXL345_DataRate_t {
ADXL345_DATARATE_3200_HZ = 0x0F
, ADXL345_DATARATE_1600_HZ = 0x0E
, ADXL345_DATARATE_800_HZ = 0x0D
, ADXL345_DATARATE_400_HZ = 0x0C
,
ADXL345_DATARATE_200_HZ = 0x0B
, ADXL345_DATARATE_100_HZ = 0x0A
, ADXL345_DATARATE_50_HZ = 0x09
, ADXL345_DATARATE_25_HZ = 0x08
,
ADXL345_DATARATE_12_5_HZ = 0x07
, ADXL345_DATARATE_6_25HZ = 0x06
, ADXL345_DATARATE_3_13_HZ = 0x05
, ADXL345_DATARATE_1_56_HZ = 0x04
,
ADXL345_DATARATE_0_78_HZ = 0x03
, ADXL345_DATARATE_0_39_HZ = 0x02
, ADXL345_DATARATE_0_20_HZ = 0x01
, ADXL345_DATARATE_0_10_HZ = 0x00
} |
| | Used with register 0x2C (ADXL345_REG_BW_RATE) to set bandwidth. More...
|
| |
| enum | ADXL345_SelfTest_t { ADXL345_SELF_TEST_OFF = 0x00
, ADXL345_SELF_TEST_ON = 0x80
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set SPI wires. More...
|
| |
| enum | ADXL345_SPI_Wire_t { ADXL345_SPI_WIRE_4 = 0x00
, ADXL345_SPI_WIRE_3 = 0x40
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set SPI wires. More...
|
| |
| enum | ADXL345_IntActive_t { ADXL345_INT_ACTIVE_HIGH = 0x00
, ADXL345_INT_ACTIVE_LOW = 0x20
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set interrupt active level. More...
|
| |
| enum | ADXL345_DataResolve_t { ADXL345_DATA_RESOLVE_10BIT = 0x00
, ADXL345_DATA_RESOLVE_FULL = 0x08
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set resolution mode. More...
|
| |
| enum | ADXL345_DataAlignment_t { ADXL345_DATA_ALIGNMENT_RIGHT = 0x00
, ADXL345_DATA_ALIGNMENT_LEFT = 0x04
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set data alignment. More...
|
| |
| enum | ADXL345_G_Range_t { ADXL345_G_RANGE_2G = 0x00
, ADXL345_G_RANGE_4G = 0x01
, ADXL345_G_RANGE_8G = 0x02
, ADXL345_G_RANGE_16G = 0x03
} |
| | Used with register ADXL345_REG_DATA_FORMAT to set g range. More...
|
| |
◆ ADXL345_CS
◆ ADXL345_DEFAULT_ADDRESS
| #define ADXL345_DEFAULT_ADDRESS (0x53) |
◆ ADXL345_DEVICE_ID
| #define ADXL345_DEVICE_ID (0xE5) |
◆ ADXL345_INT1
◆ ADXL345_INT2
◆ ADXL345_INT_ACTIVITY
| #define ADXL345_INT_ACTIVITY (0x10) |
◆ ADXL345_INT_DATA_READY
| #define ADXL345_INT_DATA_READY (0x80) |
Interrupt bits
Definition at line 66 of file adxl345.h.
◆ ADXL345_INT_DOUBLE_TAP
| #define ADXL345_INT_DOUBLE_TAP (0x20) |
◆ ADXL345_INT_FREE_FALL
| #define ADXL345_INT_FREE_FALL (0x04) |
◆ ADXL345_INT_INACTIVITY
| #define ADXL345_INT_INACTIVITY (0x08) |
◆ ADXL345_INT_OVERRUN
| #define ADXL345_INT_OVERRUN (0x01) |
◆ ADXL345_INT_SINGLE_TAP
| #define ADXL345_INT_SINGLE_TAP (0x40) |
◆ ADXL345_INT_WATERMARK
| #define ADXL345_INT_WATERMARK (0x02) |
◆ ADXL345_MG2G_MULTIPLIER
| #define ADXL345_MG2G_MULTIPLIER (0.004) |
◆ ADXL345_MISO
◆ ADXL345_MOSI
◆ ADXL345_REG_ACT_INACT_CTL
| #define ADXL345_REG_ACT_INACT_CTL (0x27) |
◆ ADXL345_REG_ACT_TAP_STATUS
| #define ADXL345_REG_ACT_TAP_STATUS (0x2B) |
◆ ADXL345_REG_BW_RATE
| #define ADXL345_REG_BW_RATE (0x2C) |
◆ ADXL345_REG_DATA_FORMAT
| #define ADXL345_REG_DATA_FORMAT (0x31) |
◆ ADXL345_REG_DATAX0
| #define ADXL345_REG_DATAX0 (0x32) |
◆ ADXL345_REG_DATAX1
| #define ADXL345_REG_DATAX1 (0x33) |
◆ ADXL345_REG_DATAY0
| #define ADXL345_REG_DATAY0 (0x34) |
◆ ADXL345_REG_DATAY1
| #define ADXL345_REG_DATAY1 (0x35) |
◆ ADXL345_REG_DATAZ0
| #define ADXL345_REG_DATAZ0 (0x36) |
◆ ADXL345_REG_DATAZ1
| #define ADXL345_REG_DATAZ1 (0x37) |
◆ ADXL345_REG_DEVID
| #define ADXL345_REG_DEVID (0x00) |
◆ ADXL345_REG_DUR
| #define ADXL345_REG_DUR (0x21) |
◆ ADXL345_REG_FIFO_CTL
| #define ADXL345_REG_FIFO_CTL (0x38) |
◆ ADXL345_REG_FIFO_STATUS
| #define ADXL345_REG_FIFO_STATUS (0x39) |
◆ ADXL345_REG_INT_ENABLE
| #define ADXL345_REG_INT_ENABLE (0x2E) |
◆ ADXL345_REG_INT_MAP
| #define ADXL345_REG_INT_MAP (0x2F) |
◆ ADXL345_REG_INT_SOURCE
| #define ADXL345_REG_INT_SOURCE (0x30) |
◆ ADXL345_REG_LATENT
| #define ADXL345_REG_LATENT (0x22) |
◆ ADXL345_REG_OFSX
| #define ADXL345_REG_OFSX (0x1E) |
◆ ADXL345_REG_OFSY
| #define ADXL345_REG_OFSY (0x1F) |
◆ ADXL345_REG_OFSZ
| #define ADXL345_REG_OFSZ (0x20) |
◆ ADXL345_REG_POWER_CTL
| #define ADXL345_REG_POWER_CTL (0x2D) |
◆ ADXL345_REG_TAP_AXES
| #define ADXL345_REG_TAP_AXES (0x2A) |
◆ ADXL345_REG_THRESH_ACT
| #define ADXL345_REG_THRESH_ACT (0x24) |
◆ ADXL345_REG_THRESH_FF
| #define ADXL345_REG_THRESH_FF (0x28) |
◆ ADXL345_REG_THRESH_INACT
| #define ADXL345_REG_THRESH_INACT (0x25) |
◆ ADXL345_REG_THRESH_TAP
| #define ADXL345_REG_THRESH_TAP (0x1D) |
◆ ADXL345_REG_TIME_FF
| #define ADXL345_REG_TIME_FF (0x29) |
◆ ADXL345_REG_TIME_INACT
| #define ADXL345_REG_TIME_INACT (0x26) |
◆ ADXL345_REG_WINDOW
| #define ADXL345_REG_WINDOW (0x23) |
◆ ADXL345_SCK
◆ ADXL345_TAP_DETECT_AXIS_X
| #define ADXL345_TAP_DETECT_AXIS_X (0x04) |
◆ ADXL345_TAP_DETECT_AXIS_Y
| #define ADXL345_TAP_DETECT_AXIS_Y (0x02) |
◆ ADXL345_TAP_DETECT_AXIS_Z
| #define ADXL345_TAP_DETECT_AXIS_Z (0x01) |
◆ ADXL345_DataAlignment_t
Used with register ADXL345_REG_DATA_FORMAT to set data alignment.
| Enumerator |
|---|
| ADXL345_DATA_ALIGNMENT_RIGHT | |
| ADXL345_DATA_ALIGNMENT_LEFT | |
Definition at line 137 of file adxl345.h.
137 {
ADXL345_DataAlignment_t
Used with register ADXL345_REG_DATA_FORMAT to set data alignment.
@ ADXL345_DATA_ALIGNMENT_RIGHT
@ ADXL345_DATA_ALIGNMENT_LEFT
◆ ADXL345_DataRate_t
Used with register 0x2C (ADXL345_REG_BW_RATE) to set bandwidth.
| Enumerator |
|---|
| ADXL345_DATARATE_3200_HZ | |
| ADXL345_DATARATE_1600_HZ | |
| ADXL345_DATARATE_800_HZ | |
| ADXL345_DATARATE_400_HZ | |
| ADXL345_DATARATE_200_HZ | |
| ADXL345_DATARATE_100_HZ | |
| ADXL345_DATARATE_50_HZ | |
| ADXL345_DATARATE_25_HZ | |
| ADXL345_DATARATE_12_5_HZ | |
| ADXL345_DATARATE_6_25HZ | |
| ADXL345_DATARATE_3_13_HZ | |
| ADXL345_DATARATE_1_56_HZ | |
| ADXL345_DATARATE_0_78_HZ | |
| ADXL345_DATARATE_0_39_HZ | |
| ADXL345_DATARATE_0_20_HZ | |
| ADXL345_DATARATE_0_10_HZ | |
Definition at line 82 of file adxl345.h.
82 {
ADXL345_DataRate_t
Used with register 0x2C (ADXL345_REG_BW_RATE) to set bandwidth.
@ ADXL345_DATARATE_1600_HZ
@ ADXL345_DATARATE_3_13_HZ
@ ADXL345_DATARATE_3200_HZ
@ ADXL345_DATARATE_200_HZ
@ ADXL345_DATARATE_1_56_HZ
@ ADXL345_DATARATE_6_25HZ
@ ADXL345_DATARATE_400_HZ
@ ADXL345_DATARATE_100_HZ
@ ADXL345_DATARATE_0_10_HZ
@ ADXL345_DATARATE_800_HZ
@ ADXL345_DATARATE_0_20_HZ
@ ADXL345_DATARATE_0_39_HZ
@ ADXL345_DATARATE_12_5_HZ
@ ADXL345_DATARATE_0_78_HZ
◆ ADXL345_DataResolve_t
Used with register ADXL345_REG_DATA_FORMAT to set resolution mode.
| Enumerator |
|---|
| ADXL345_DATA_RESOLVE_10BIT | |
| ADXL345_DATA_RESOLVE_FULL | |
Definition at line 129 of file adxl345.h.
129 {
ADXL345_DataResolve_t
Used with register ADXL345_REG_DATA_FORMAT to set resolution mode.
@ ADXL345_DATA_RESOLVE_FULL
@ ADXL345_DATA_RESOLVE_10BIT
◆ ADXL345_G_Range_t
Used with register ADXL345_REG_DATA_FORMAT to set g range.
| Enumerator |
|---|
| ADXL345_G_RANGE_2G | |
| ADXL345_G_RANGE_4G | |
| ADXL345_G_RANGE_8G | |
| ADXL345_G_RANGE_16G | |
Definition at line 145 of file adxl345.h.
145 {
ADXL345_G_Range_t
Used with register ADXL345_REG_DATA_FORMAT to set g range.
◆ ADXL345_IntActive_t
Used with register ADXL345_REG_DATA_FORMAT to set interrupt active level.
| Enumerator |
|---|
| ADXL345_INT_ACTIVE_HIGH | |
| ADXL345_INT_ACTIVE_LOW | |
Definition at line 121 of file adxl345.h.
121 {
ADXL345_IntActive_t
Used with register ADXL345_REG_DATA_FORMAT to set interrupt active level.
@ ADXL345_INT_ACTIVE_HIGH
◆ ADXL345_SelfTest_t
Used with register ADXL345_REG_DATA_FORMAT to set SPI wires.
| Enumerator |
|---|
| ADXL345_SELF_TEST_OFF | |
| ADXL345_SELF_TEST_ON | |
Definition at line 105 of file adxl345.h.
105 {
ADXL345_SelfTest_t
Used with register ADXL345_REG_DATA_FORMAT to set SPI wires.
◆ ADXL345_SPI_Wire_t
Used with register ADXL345_REG_DATA_FORMAT to set SPI wires.
| Enumerator |
|---|
| ADXL345_SPI_WIRE_4 | |
| ADXL345_SPI_WIRE_3 | |
Definition at line 113 of file adxl345.h.
113 {
ADXL345_SPI_Wire_t
Used with register ADXL345_REG_DATA_FORMAT to set SPI wires.
◆ ADXL345_EnableTapDetectOnAxes()
| void ADXL345_EnableTapDetectOnAxes |
( |
uint8_t |
axes | ) |
|
Definition at line 88 of file adxl345.c.
89{
91}
void ADXL345_WriteByte(uint8_t addr, uint8_t dat)
#define ADXL345_REG_TAP_AXES
◆ ADXL345_Init()
Definition at line 50 of file adxl345.c.
57{
59 {
62 spiWire|intLevel|resolve|alignment|range);
65 }
66 else
67 {
69 }
70}
uint8_t ADXL345_ReadByte(uint8_t addr)
#define ADXL345_REG_DEVID
#define ADXL345_REG_BW_RATE
#define ADXL345_REG_DATA_FORMAT
#define ADXL345_DEVICE_ID
#define ADXL345_REG_POWER_CTL
◆ ADXL345_IsInterrupt()
Definition at line 82 of file adxl345.c.
83{
85 return (int_src & interrupt);
86}
#define ADXL345_REG_INT_SOURCE
◆ ADXL345_ReadByte()
Definition at line 20 of file adxl345.c.
21{
28}
void SPI_TxRxBytes(uint8_t *pBuf, uint8_t len)
◆ ADXL345_ReadInt()
◆ ADXL345_RemapInterrupts()
| void ADXL345_RemapInterrupts |
( |
uint8_t |
interrupts | ) |
|
Remap interrupts to INT2 (default is INT1)
Definition at line 77 of file adxl345.c.
78{
80}
#define ADXL345_REG_INT_MAP
◆ ADXL345_SetInterrupts()
| void ADXL345_SetInterrupts |
( |
uint8_t |
interrupts | ) |
|
Enable interrupts
Definition at line 72 of file adxl345.c.
73{
75}
#define ADXL345_REG_INT_ENABLE
◆ ADXL345_WriteByte()