53#define MAX7219_BLOCKS 4
55#define DECODE_MODE 0x09
57#define SCAN_LIMIT 0x0B
59#define DISPLAY_TEST 0x0F
62 0x3e,0x63,0x63,0x7f,0x63,0x63,0x63,0x63,
63 0x7e,0x63,0x63,0x7e,0x63,0x63,0x63,0x7e,
64 0x3e,0x63,0x63,0x60,0x60,0x63,0x63,0x3e,
65 0x7e,0x63,0x63,0x63,0x63,0x63,0x63,0x7e,
66 0x7f,0x60,0x60,0x7f,0x60,0x60,0x60,0x7f,
67 0x7f,0x60,0x60,0x7e,0x60,0x60,0x60,0x60,
68 0x3e,0x63,0x63,0x60,0x67,0x63,0x63,0x3e,
69 0x63,0x63,0x63,0x7f,0x63,0x63,0x63,0x63,
70 0x3f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x3f,
71 0x1f,0x06,0x06,0x06,0x06,0x66,0x66,0x3c,
72 0x63,0x66,0x6c,0x78,0x6c,0x66,0x63,0x61,
73 0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x7f,
74 0x63,0x77,0x7f,0x6b,0x63,0x63,0x63,0x63,
75 0x63,0x63,0x73,0x7b,0x6f,0x67,0x63,0x63,
76 0x3e,0x63,0x63,0x63,0x63,0x63,0x63,0x3e,
77 0x7e,0x63,0x63,0x63,0x7e,0x60,0x60,0x60,
78 0x3c,0x66,0x66,0x66,0x66,0x6e,0x66,0x3f,
79 0x7e,0x63,0x63,0x63,0x7e,0x6c,0x66,0x63,
80 0x3e,0x63,0x63,0x60,0x3e,0x03,0x63,0x3e,
81 0x3f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,
82 0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x3e,
83 0x63,0x63,0x63,0x63,0x63,0x36,0x1c,0x08,
84 0x63,0x63,0x63,0x63,0x6b,0x7f,0x77,0x63,
85 0x63,0x63,0x36,0x1c,0x1c,0x36,0x63,0x63,
86 0x33,0x33,0x33,0x33,0x1e,0x0c,0x0c,0x0c,
87 0x7f,0x03,0x06,0x0c,0x18,0x30,0x60,0x7f,
88 0x3e,0x63,0x73,0x6b,0x67,0x63,0x63,0x3e,
89 0x0c,0x1c,0x3c,0x0c,0x0c,0x0c,0x0c,0x3f,
90 0x3e,0x63,0x63,0x06,0x0c,0x18,0x30,0x7f,
91 0x3e,0x63,0x63,0x0e,0x03,0x63,0x63,0x3e,
92 0x06,0x0e,0x1e,0x36,0x66,0x7f,0x06,0x06,
93 0x7f,0x60,0x60,0x7e,0x03,0x03,0x03,0x7e,
94 0x3e,0x63,0x60,0x7e,0x63,0x63,0x63,0x3e,
95 0x7f,0x03,0x03,0x06,0x0c,0x18,0x18,0x18,
96 0x3e,0x63,0x63,0x3e,0x63,0x63,0x63,0x3e,
97 0x3e,0x63,0x63,0x63,0x3f,0x03,0x63,0x3e,
172 uint8_t i, j, cpos = 0, bpos = 0, tcpos = 0;
189 for (
i = 0;
i < 8;
i++)
#define GPIO_P1_SetMode(__PINS__, __MODE__)
#define SPI_SetClockPrescaler(__PRE_SCALER__)
#define SPI_SetPort(__ALTER_PORT__)
#define SPI_SetDataOrder(__ORDER__)
#define SPI_SetEnabled(__STATE__)
#define SPI_SetClockPolarity(__STATE__)
uint8_t SPI_TxRx(uint8_t dat)
#define SPI_SetClockPhase(__PHASE__)
@ SPI_ClockPhase_LeadingEdge
#define SPI_IgnoreSlaveSelect(__STATE__)
#define SPI_SetMasterMode(__STATE__)
@ SPI_AlterPort_P12P54_P13_P14_P15
void SYS_Delay(uint16_t t)
void MAX7219_multiWrite(uint8_t addr, uint8_t len, uint8_t *dat)
void MAX7219_singeWrite(uint8_t index, uint8_t addr, uint8_t dat)
uint8_t val[MAX7219_BLOCKS]