nrf24l01.c File Reference

#include "nrf24l01.h"

Go to the source code of this file.

Functions
void	NRF24L01_WriteReg (uint8_t reg, uint8_t value)
uint8_t	NRF24L01_ReadReg (uint8_t reg)
void	NRF24L01_ReadToBuf (uint8_t reg, uint8_t len)
void	NRF24L01_WriteFromBuf (uint8_t reg, const uint8_t *pBuf, uint8_t len)
void	NRF24L01_PrintBuf (void)
void	NRF24L01_FlushRX (void)
void	NRF24L01_FlushTX (void)
void	NRF24L01_CheckFlag (uint8_t *tx_ds, uint8_t *max_rt, uint8_t *rx_dr)
uint8_t	NRF24L01_RxAvailable (uint8_t *pipe_num)
void	NRF24L01_HandelIrqFlag (void)
void	NRF24L01_Tx (uint8_t *pBuf)
void	NRF24L01_StartFastWrite (const void *pBuf)
uint8_t	NRF24L01_WriteFast (const void *pBuf)
void	NRF24L01_ResetTX (void)
uint8_t	NRF24L01_Check (void)
void	NRF24L01_Init (NRF24_MODE mode)

Variables
uint8_t __IDATA	xbuf [NRF24_PLOAD_WIDTH+1]
uint8_t *	xbuf_data = xbuf + 1
uint16_t	NRF24L01_rxsn = 0
const uint8_t	TX_ADDRESS [NRF24_ADDR_WIDTH] = {0x32,0x4E,0x6F,0x64,0x22}
const uint8_t	RX_ADDRESS [NRF24_ADDR_WIDTH] = {0x32,0x4E,0x6F,0x64,0x65}

Function Documentation

NRF24L01_Check()

uint8_t NRF24L01_Check

(

void

)

Definition at line 168 of file nrf24l01.c.

{
    uint8_t i;
    const uint8_t *ptr = (const uint8_t *)NRF24_TEST_ADDR;
    NRF24L01_WriteFromBuf(NRF24_CMD_W_REGISTER | NRF24_REG_TX_ADDR, ptr, NRF24_ADDR_WIDTH);
    NRF24L01_ReadToBuf(NRF24_CMD_R_REGISTER | NRF24_REG_TX_ADDR, NRF24_ADDR_WIDTH);
    for (i = 0; i < NRF24_ADDR_WIDTH; i++) {
        UART1_TxHex(*(xbuf_data + i));
        if (*(xbuf_data + i) != *ptr++) return 1;
    }
    return 0;
}

NRF24L01_CheckFlag()

void NRF24L01_CheckFlag	(	uint8_t *	tx_ds,
		uint8_t *	max_rt,
		uint8_t *	rx_dr
	)

Definition at line 87 of file nrf24l01.c.

{
    // Read the status & reset the status in one easy call
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_STATUS, NRF24_FLAG_RX_DREADY|NRF24_FLAG_TX_DSENT|NRF24_FLAG_MAX_RT);
    // Report to the user what happened
    *tx_ds = xbuf[0] & NRF24_FLAG_TX_DSENT;
    *max_rt = xbuf[0] & NRF24_FLAG_MAX_RT;
    *rx_dr = xbuf[0] & NRF24_FLAG_RX_DREADY;
}

NRF24L01_FlushRX()

void NRF24L01_FlushRX

(

void

)

Flush the RX FIFO

Definition at line 74 of file nrf24l01.c.

{
    NRF24L01_WriteReg(NRF24_CMD_FLUSH_RX, NRF24_CMD_NOP);
}

NRF24L01_FlushTX()

void NRF24L01_FlushTX

(

void

)

Flush the TX FIFO

Definition at line 82 of file nrf24l01.c.

{
    NRF24L01_WriteReg(NRF24_CMD_FLUSH_TX, NRF24_CMD_NOP);
}

NRF24L01_HandelIrqFlag()

void NRF24L01_HandelIrqFlag

(

void

)

Definition at line 111 of file nrf24l01.c.

{
    uint8_t tx_ds, max_rt, rx_dr, pipe_num;
    NRF24L01_CheckFlag(&tx_ds, &max_rt, &rx_dr);
    if (NRF24L01_RxAvailable(&pipe_num) == 1) 
    {
        NRF24L01_ReadToBuf(NRF24_CMD_R_RX_PAYLOAD, NRF24_PLOAD_WIDTH);
        NRF24L01_rxsn++;
    }
    UART1_TxHex(tx_ds);
    UART1_TxChar(' ');
    UART1_TxHex(max_rt);
    UART1_TxChar(' ');
    UART1_TxHex(rx_dr);
    UART1_TxChar(' ');
    UART1_TxHex(pipe_num);
    UART1_TxString("\r\n");
    NRF24L01_PrintBuf();
}

NRF24L01_Init()

void NRF24L01_Init

(

NRF24_MODE

mode

)

Definition at line 181 of file nrf24l01.c.

{
    NRF_CE = 0;
    NRF24L01_WriteFromBuf(NRF24_CMD_W_REGISTER + NRF24_REG_TX_ADDR, (uint8_t *)TX_ADDRESS, NRF24_ADDR_WIDTH);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_RX_PW_P0, NRF24_PLOAD_WIDTH);
    NRF24L01_WriteFromBuf(NRF24_CMD_W_REGISTER + NRF24_REG_RX_ADDR_P0, (uint8_t *)TX_ADDRESS, NRF24_ADDR_WIDTH);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_RX_PW_P1, NRF24_PLOAD_WIDTH);
    NRF24L01_WriteFromBuf(NRF24_CMD_W_REGISTER + NRF24_REG_RX_ADDR_P1, (uint8_t *)RX_ADDRESS, NRF24_ADDR_WIDTH);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_EN_AA, 0x3f);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_EN_RXADDR, 0x3f);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_SETUP_RETR, 0x13);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_RF_CH, 40);
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_RF_SETUP, 0x07);
    switch (mode)
    {
        case NRF24_MODE_TX:
            NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_CONFIG, 0x0E);
            break;
        case NRF24_MODE_RX:
        default:
            NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_CONFIG, 0x0F);
            break;
    }
    NRF_CE = 1;
}

NRF24L01_PrintBuf()

void NRF24L01_PrintBuf

(

void

)

Definition at line 61 of file nrf24l01.c.

{
    uint8_t i;
    for (i = 0; i < NRF24_PLOAD_WIDTH + 1; i++)
    {
        UART1_TxHex(xbuf[i]);
    }
    UART1_TxString("\r\n");
}

NRF24L01_ReadReg()

uint8_t NRF24L01_ReadReg

(

uint8_t

reg

)

Definition at line 33 of file nrf24l01.c.

{
    NRF_CSN = 0;
    xbuf[0] = reg;
    xbuf[1] = NRF24_CMD_NOP;
    SPI_TxRxBytes(xbuf, 2);
    NRF_CSN = 1;
    return xbuf[1];
}

NRF24L01_ReadToBuf()

void NRF24L01_ReadToBuf	(	uint8_t	reg,
		uint8_t	len
	)

Definition at line 43 of file nrf24l01.c.

{
    NRF_CSN = 0;
    memset(xbuf, NRF24_CMD_NOP, NRF24_PLOAD_WIDTH + 1);
    xbuf[0] = reg;
    SPI_TxRxBytes(xbuf, len + 1);
    NRF_CSN = 1;
}

NRF24L01_ResetTX()

void NRF24L01_ResetTX

(

void

)

Definition at line 161 of file nrf24l01.c.

{
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_STATUS, NRF24_FLAG_MAX_RT);//Clear max retry flag
    NRF_CE = 0;
    NRF_CE = 1;
}

NRF24L01_RxAvailable()

uint8_t NRF24L01_RxAvailable

(

uint8_t *

pipe_num

)

Definition at line 97 of file nrf24l01.c.

{
    uint8_t pipe;
    NRF24L01_ReadReg(NRF24_REG_STATUS);
    pipe = (xbuf[0] >> 1) & 0x07;
    if (pipe > 5)
        return 0;
    // If the caller wants the pipe number, include that
    if (pipe_num)
        *pipe_num = pipe;
 
    return 1;
}

NRF24L01_StartFastWrite()

void NRF24L01_StartFastWrite

(

const void *

pBuf

)

Definition at line 143 of file nrf24l01.c.

{
    NRF24L01_WriteFromBuf(NRF24_CMD_W_TX_PAYLOAD, pBuf, NRF24_PLOAD_WIDTH);
    NRF_CE = 1;
}

NRF24L01_Tx()

void NRF24L01_Tx

(

uint8_t *

pBuf

)

Definition at line 131 of file nrf24l01.c.

{
    NRF_CE = 0;
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_CONFIG, 0x0E);
    NRF24L01_WriteFromBuf(NRF24_CMD_W_TX_PAYLOAD, pBuf, NRF24_PLOAD_WIDTH);
    NRF_CE = 1;
    SYS_Delay(10); // for reliable DS state when SETUP_RETR is 0x13
    NRF_CE = 0;
    NRF24L01_WriteReg(NRF24_CMD_W_REGISTER + NRF24_REG_CONFIG, 0x0F);
    NRF_CE = 1;
}

NRF24L01_WriteFast()

uint8_t NRF24L01_WriteFast

(

const void *

pBuf

)

Definition at line 149 of file nrf24l01.c.

{
    //Blocking only if FIFO is full. This will loop and block until TX is successful or fail
    while ((NRF24L01_ReadReg(NRF24_REG_STATUS) & NRF24_FLAG_TX_FULL)) {
        if (xbuf[0] & NRF24_FLAG_MAX_RT) {
            return 0;
        }
    }
    NRF24L01_StartFastWrite(pBuf);
    return 1;
}

NRF24L01_WriteFromBuf()

void NRF24L01_WriteFromBuf	(	uint8_t	reg,
		const uint8_t *	pBuf,
		uint8_t	len
	)

Definition at line 52 of file nrf24l01.c.

{
    NRF_CSN = 0;
    xbuf[0] = reg;
    memcpy(xbuf_data, pBuf, len);
    SPI_TxRxBytes(xbuf, len + 1);
    NRF_CSN = 1;
}

NRF24L01_WriteReg()

void NRF24L01_WriteReg	(	uint8_t	reg,
		uint8_t	value
	)

Definition at line 24 of file nrf24l01.c.

{
    NRF_CSN = 0;
    xbuf[0] = reg;
    xbuf[1] = value;
    SPI_TxRxBytes(xbuf, 2);
    NRF_CSN = 1;
}

Variable Documentation

NRF24L01_rxsn

uint16_t NRF24L01_rxsn = 0

Definition at line 19 of file nrf24l01.c.

RX_ADDRESS

const uint8_t RX_ADDRESS[NRF24_ADDR_WIDTH] = {0x32,0x4E,0x6F,0x64,0x65}

Definition at line 22 of file nrf24l01.c.

TX_ADDRESS

const uint8_t TX_ADDRESS[NRF24_ADDR_WIDTH] = {0x32,0x4E,0x6F,0x64,0x22}

Definition at line 21 of file nrf24l01.c.

xbuf

uint8_t __IDATA xbuf[NRF24_PLOAD_WIDTH+1]

Definition at line 17 of file nrf24l01.c.

xbuf_data

uint8_t* xbuf_data = xbuf + 1

Definition at line 18 of file nrf24l01.c.